Hi Stefan,
On Mon, Jan 18, 2016 at 5:56 PM, Stefan Roese <s...@denx.de> wrote:
> The FSP enables the BayTrail internal UART (again). Boards that don't use
> this UART but an external one instead (e.g. provided by a Super IO chip)
> need to disable this internal UART. So that the one from the Super IO
> chip can be used. This patch adds the necessary code, to disable the
> internal legacy UART if the Winbond Super IO chip is enabled.
>
> Signed-off-by: Stefan Roese <s...@denx.de>
> Cc: Bin Meng <bmeng...@gmail.com>
> Cc: Simon Glass <s...@chromium.org>
> ---
> arch/x86/lib/fsp/fsp_support.c | 14 ++++++++++++++
> 1 file changed, 14 insertions(+)
>
> diff --git a/arch/x86/lib/fsp/fsp_support.c b/arch/x86/lib/fsp/fsp_support.c
> index 875c96a..8114b81 100644
> --- a/arch/x86/lib/fsp/fsp_support.c
> +++ b/arch/x86/lib/fsp/fsp_support.c
> @@ -89,6 +89,13 @@ struct fsp_header *__attribute__((optimize("O0")))
> find_fsp_header(void)
>
> void fsp_continue(u32 status, void *hob_list)
> {
> + /*
> + * The FSP enables the BayTrail internal legacy UART (again).
> + * Disable it again, so that the Winbond one can be used.
> + */
> + if (IS_ENABLED(CONFIG_WINBOND_W83627))
> + disable_internal_uart();
> +
I would put this into the board_init_f(), right before enabling super
I/O legacy UART. This way we avoid changing the generic FSP codes.
> post_code(POST_MRC);
>
> assert(status == 0);
> @@ -114,6 +121,13 @@ void fsp_init(u32 stack_top, u32 boot_mode, void
> *nvs_buf)
> setup_early_uart();
> #endif
>
> + /*
> + * To use the Winbond legacy UART (COM1), the BayTrail internal
> + * legacy UART needs to get disabled first.
> + */
> + if (IS_ENABLED(CONFIG_WINBOND_W83627))
> + disable_internal_uart();
> +
I don't think this change is needed as fsp_init() will enable legacy
UART anyway.
> fsp_hdr = find_fsp_header();
> if (fsp_hdr == NULL) {
> /* No valid FSP info header was found */
> --
Regards,
Bin
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