On 3/03/2016 2:49 PM, George Broz wrote:
On 1 March 2016 at 19:49, Phil Reid <pr...@electromag.com.au> wrote:
On 2/03/2016 10:40 AM, George Broz wrote:
Sorry for the delayed response - got called away, but am back to this
now. I patched
socfpga_common.h and re-built the project. I picked up
spl/u-boot-spl-dtb.sfp and
u-boot-dtb.img and transferred them to the SD card with:
dd if=u-boot-spl-dtb.sfp of=/dev/sdf3 bs=64k seek=0
dd if=u-boot-dtb.img of=/dev/sdf3 bs=64k seek=4
Tried this with both the original DT set (socfpga.dtsi,
socfpga_cyclone.dtsi,
socfpga_cyclone5_sockit.dts) that came with the u-boot v2016.01 download
and
also an Altera-patched DT set that I've used to boot into Linux numerous
times.
When I start up the board I get:
U-Boot SPL 2016.01 (Mar 01 2016 - 17:28:14)
drivers/ddr/altera/sequencer.c: Preparing to start memory calibration
drivers/ddr/altera/sequencer.c: CALIBRATION FAILED
drivers/ddr/altera/sequencer.c: Calibration complete
SDRAM calibration failed.
### ERROR ### Please RESET the board ###
I'm not a Quartus user, so I haven't done anything with the
qts-filter.sh script you
mentioned. Do I need to? I don't have any custom FPGA logic - it's
just the Terasic
board out of the box.
Thanks for any help!
Even without the custom FPGA logic the files generated from qts-filter.sh
need to match your board.
Sets up PLL and SDRAM parameters.
I'm not familiar with the Terasic dev board ( I do have the altera devkit,
but haven't used it for awhile).
I'd hope the files in the git repo are correct for your board.
Without the corresponding qsys project it's hard to be sure.
Hi Phil,
So as my next attempt, there was a Quartus/Qsys example that came
with the Terasic board (specific to my Rev. of the board).
* I took the contents of the 'handoff folder', .sof, and .sopcinfo file.
* launched an "Embedded Command Shell" from EDS 15.0 and then the BSP editor GUI
* pointed the BSP editor to the "handoff folder", and hit "Generate"
to produce iocsr, pinmux, pll, etc. files
* applied qts-filter.sh to these files, the output of which I then
dropped into the u-boot source @ ../board/terasic/sockit/qts
* rebuilt uboot spl & image, but got a similar result:
U-Boot SPL 2016.01 (Mar 02 2016 - 22:13:31)
drivers/ddr/altera/sequencer.c: Preparing to start memory calibration
drivers/ddr/altera/sequencer.c: CALIBRATION FAILED
drivers/ddr/altera/sequencer.c: Calibration complete
SDRAM calibration failed.
### ERROR ### Please RESET the board ###
Except now it repeats four times, whereas before it only printed out once.
It that essentially the correct procedure? Is it now a matter of
looking through
the include files that where generated by qts-filter.sh to find a
setting that is "off"?
(BTW - my first attempt was to use EDS 13.0, but that resulted in
several undefined macros when it
came time to compile u-boot with the qts-filter-generated code. How
does one know which tool version to use?)
What does a diff of the new files show compared to the ones in uboot.
I'm using the Quartus 15.0 tool chain at the moment.
Turning on debugging in drivers/ddr/altera/sequencer.c may help.
--
Regards
Phil Reid
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