Updating the memory banks properly so that DT is populated accordingly.
And updating this only after DDR is properly detected by eeprom, so that
git bisect is still maintained.
Acked-by: Nishanth Menon <n...@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvu...@ti.com>
---
board/ti/dra7xx/evm.c | 14 ++++++++++++++
1 file changed, 14 insertions(+)
diff --git a/board/ti/dra7xx/evm.c b/board/ti/dra7xx/evm.c
index d142ccc..4c6dfa0 100644
--- a/board/ti/dra7xx/evm.c
+++ b/board/ti/dra7xx/evm.c
@@ -268,6 +268,20 @@ int board_init(void)
return 0;
}
+void dram_init_banksize(void)
+{
+ u64 ram_size;
+
+ ram_size = board_ti_get_emif_size();
+
+ gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
+ gd->bd->bi_dram[0].size = get_effective_memsize();
+ if (ram_size > CONFIG_MAX_MEM_MAPPED) {
+ gd->bd->bi_dram[1].start = 0x200000000;
+ gd->bd->bi_dram[1].size = ram_size - CONFIG_MAX_MEM_MAPPED;
+ }
+}
+
int board_late_init(void)
{
#ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
--
2.1.4
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