This cache-as-RAM (CAR) code is common to several Intel chips. Create a new
intel_common directory and move it in there.
Signed-off-by: Simon Glass <s...@chromium.org>
---
arch/x86/cpu/Makefile | 1 +
arch/x86/cpu/intel_common/Makefile | 7 +++++++
arch/x86/cpu/{ivybridge => intel_common}/car.S | 0
arch/x86/cpu/ivybridge/Makefile | 1 -
4 files changed, 8 insertions(+), 1 deletion(-)
create mode 100644 arch/x86/cpu/intel_common/Makefile
rename arch/x86/cpu/{ivybridge => intel_common}/car.S (100%)
diff --git a/arch/x86/cpu/Makefile b/arch/x86/cpu/Makefile
index 2ff2377..2583809 100644
--- a/arch/x86/cpu/Makefile
+++ b/arch/x86/cpu/Makefile
@@ -18,6 +18,7 @@ AFLAGS_call32.o := -fpic -fshort-wchar
extra-y += call32.o
+obj-y += intel_common/
obj-$(CONFIG_INTEL_BAYTRAIL) += baytrail/
obj-$(CONFIG_SYS_COREBOOT) += coreboot/
obj-$(CONFIG_EFI_APP) += efi/
diff --git a/arch/x86/cpu/intel_common/Makefile
b/arch/x86/cpu/intel_common/Makefile
new file mode 100644
index 0000000..5dd9573
--- /dev/null
+++ b/arch/x86/cpu/intel_common/Makefile
@@ -0,0 +1,7 @@
+#
+# Copyright (c) 2016 Google, Inc
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+obj-$(CONFIG_HAVE_MRC) += car.o
diff --git a/arch/x86/cpu/ivybridge/car.S b/arch/x86/cpu/intel_common/car.S
similarity index 100%
rename from arch/x86/cpu/ivybridge/car.S
rename to arch/x86/cpu/intel_common/car.S
diff --git a/arch/x86/cpu/ivybridge/Makefile b/arch/x86/cpu/ivybridge/Makefile
index 9203219..b117f0d 100644
--- a/arch/x86/cpu/ivybridge/Makefile
+++ b/arch/x86/cpu/ivybridge/Makefile
@@ -7,7 +7,6 @@
ifdef CONFIG_HAVE_FSP
obj-y += fsp_configs.o ivybridge.o
else
-obj-y += car.o
obj-y += cpu.o
obj-y += early_me.o
obj-y += gma.o
--
2.7.0.rc3.207.g0ac5344
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