This same name is used in USB. Add a prefix to distinguish it.
Signed-off-by: Simon Glass <s...@chromium.org>
---
Changes in v2: None
arch/x86/cpu/cpu.c | 4 ++--
arch/x86/cpu/intel_common/cpu.c | 4 ++--
arch/x86/include/asm/processor.h | 2 +-
3 files changed, 5 insertions(+), 5 deletions(-)
diff --git a/arch/x86/cpu/cpu.c b/arch/x86/cpu/cpu.c
index afc3ecd..7dfe071 100644
--- a/arch/x86/cpu/cpu.c
+++ b/arch/x86/cpu/cpu.c
@@ -469,14 +469,14 @@ void flush_cache(unsigned long dummy1, unsigned long
dummy2)
__weak void reset_cpu(ulong addr)
{
/* Do a hard reset through the chipset's reset control register */
- outb(SYS_RST | RST_CPU, PORT_RESET);
+ outb(SYS_RST | RST_CPU, IO_PORT_RESET);
for (;;)
cpu_hlt();
}
void x86_full_reset(void)
{
- outb(FULL_RST | SYS_RST | RST_CPU, PORT_RESET);
+ outb(FULL_RST | SYS_RST | RST_CPU, IO_PORT_RESET);
}
int dcache_status(void)
diff --git a/arch/x86/cpu/intel_common/cpu.c b/arch/x86/cpu/intel_common/cpu.c
index 1210943..93e4505 100644
--- a/arch/x86/cpu/intel_common/cpu.c
+++ b/arch/x86/cpu/intel_common/cpu.c
@@ -102,8 +102,8 @@ int cpu_set_flex_ratio_to_tdp_nominal(void)
setbits_le32(RCB_REG(SOFT_RESET_CTRL), 1);
/* Issue warm reset, will be "CPU only" due to soft reset data */
- outb(0x0, PORT_RESET);
- outb(SYS_RST | RST_CPU, PORT_RESET);
+ outb(0x0, IO_PORT_RESET);
+ outb(SYS_RST | RST_CPU, IO_PORT_RESET);
cpu_hlt();
/* Not reached */
diff --git a/arch/x86/include/asm/processor.h b/arch/x86/include/asm/processor.h
index 7c77b90..cefc633 100644
--- a/arch/x86/include/asm/processor.h
+++ b/arch/x86/include/asm/processor.h
@@ -36,7 +36,7 @@
*
* The naming follows Intel's naming.
*/
-#define PORT_RESET 0xcf9
+#define IO_PORT_RESET 0xcf9
enum {
SYS_RST = 1 << 1, /* 0 for soft reset, 1 for hard reset */
--
2.7.0.rc3.207.g0ac5344
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