Add these node to be used in rockchip LVDS and VOP driver.

Signed-off-by: Jacob Chen <jacob-c...@iotwrt.com>
Acked-by: Simon Glass <s...@chromium.org>
---

Changes in v3:
- Include bingding file in dts

Changes in v2:
- None

 arch/arm/dts/rk3288.dtsi | 47 ++++++++++++++++++++++++++++++++++++++++++++++-
 1 file changed, 46 insertions(+), 1 deletion(-)

diff --git a/arch/arm/dts/rk3288.dtsi b/arch/arm/dts/rk3288.dtsi
index e51c75c..3dab0fc 100644
--- a/arch/arm/dts/rk3288.dtsi
+++ b/arch/arm/dts/rk3288.dtsi
@@ -9,6 +9,7 @@
 #include <dt-bindings/clock/rk3288-cru.h>
 #include <dt-bindings/power-domain/rk3288.h>
 #include <dt-bindings/thermal/thermal.h>
+#include <dt-bindings/video/rk3288.h>
 #include "skeleton.dtsi"
 
 / {
@@ -683,6 +684,10 @@
                                reg = <1>;
                                remote-endpoint = <&hdmi_in_vopb>;
                        };
+                       vopb_out_lvds: endpoint@2 {
+                               reg = <2>;
+                               remote-endpoint = <&lvds_in_vopb>;
+                       };
                };
        };
 
@@ -719,7 +724,10 @@
                                reg = <1>;
                                remote-endpoint = <&hdmi_in_vopl>;
                        };
-
+                       vopl_out_lvds: endpoint@2 {
+                               reg = <2>;
+                               remote-endpoint = <&lvds_in_vopl>;
+                       };
                };
        };
 
@@ -786,6 +794,34 @@
                };
        };
 
+       lvds: lvds@ff96c000 {
+               compatible = "rockchip,rk3288-lvds";
+               reg = <0xff96c000 0x4000>;
+               clocks = <&cru PCLK_LVDS_PHY>;
+               clock-names = "pclk_lvds";
+               pinctrl-names = "default";
+               pinctrl-0 = <&lcdc0_ctl>;
+               rockchip,grf = <&grf>;
+               status = "disabled";
+               ports {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       lvds_in: port@0 {
+                               reg = <0>;
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+                               lvds_in_vopb: endpoint@0 {
+                                       reg = <0>;
+                                       remote-endpoint = <&vopb_out_lvds>;
+                               };
+                               lvds_in_vopl: endpoint@1 {
+                                       reg = <1>;
+                                       remote-endpoint = <&vopl_out_lvds>;
+                               };
+                       };
+               };
+       };
+
        hdmi_audio: hdmi_audio {
                compatible = "rockchip,rk3288-hdmi-audio";
                i2s-controller = <&i2s>;
@@ -1109,6 +1145,15 @@
                        };
                };
 
+               lcdc0 {
+                       lcdc0_ctl: lcdc0-ctl {
+                               rockchip,pins = <1 24 RK_FUNC_1 
&pcfg_pull_none>,
+                                               <1 25 RK_FUNC_1 
&pcfg_pull_none>,
+                                               <1 26 RK_FUNC_1 
&pcfg_pull_none>,
+                                               <1 27 RK_FUNC_1 
&pcfg_pull_none>;
+                       };
+               };
+
                sdmmc {
                        sdmmc_clk: sdmmc-clk {
                                rockchip,pins = <6 20 RK_FUNC_1 
&pcfg_pull_none>;
-- 
1.9.1

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