From: Ravi Babu <ravib...@ti.com>

Add support for detection of SR2.0 version of DRA72x family of
processors.

Signed-off-by: Ravi Babu <ravib...@ti.com>
Signed-off-by: Nishanth Menon <n...@ti.com>
---
 arch/arm/cpu/armv7/omap5/hw_data.c     |    2 ++
 arch/arm/cpu/armv7/omap5/hwinit.c      |    3 +++
 arch/arm/cpu/armv7/omap5/sdram.c       |    2 ++
 arch/arm/include/asm/arch-omap5/omap.h |    1 +
 arch/arm/include/asm/omap_common.h     |    1 +
 5 files changed, 9 insertions(+)

diff --git a/arch/arm/cpu/armv7/omap5/hw_data.c 
b/arch/arm/cpu/armv7/omap5/hw_data.c
index 7f8c0a423bad..93d1efbca17d 100644
--- a/arch/arm/cpu/armv7/omap5/hw_data.c
+++ b/arch/arm/cpu/armv7/omap5/hw_data.c
@@ -775,6 +775,7 @@ void __weak hw_data_init(void)
        break;
 
        case DRA722_ES1_0:
+       case DRA722_ES2_0:
        *prcm = &dra7xx_prcm;
        *dplls_data = &dra72x_dplls;
        *omap_vcores = &dra722_volts;
@@ -807,6 +808,7 @@ void get_ioregs(const struct ctrl_ioregs **regs)
                *regs = &ioregs_dra7xx_es1;
                break;
        case DRA722_ES1_0:
+       case DRA722_ES2_0:
                *regs = &ioregs_dra72x_es1;
                break;
 
diff --git a/arch/arm/cpu/armv7/omap5/hwinit.c 
b/arch/arm/cpu/armv7/omap5/hwinit.c
index 8f184df2abb7..e3ac8bbe9524 100644
--- a/arch/arm/cpu/armv7/omap5/hwinit.c
+++ b/arch/arm/cpu/armv7/omap5/hwinit.c
@@ -373,6 +373,9 @@ void init_omap_revision(void)
        case DRA722_CONTROL_ID_CODE_ES1_0:
                *omap_si_rev = DRA722_ES1_0;
                break;
+       case DRA722_CONTROL_ID_CODE_ES2_0:
+               *omap_si_rev = DRA722_ES2_0;
+               break;
        default:
                *omap_si_rev = OMAP5430_SILICON_ID_INVALID;
        }
diff --git a/arch/arm/cpu/armv7/omap5/sdram.c b/arch/arm/cpu/armv7/omap5/sdram.c
index 7dc5bb7e4a4b..5cf360c41468 100644
--- a/arch/arm/cpu/armv7/omap5/sdram.c
+++ b/arch/arm/cpu/armv7/omap5/sdram.c
@@ -438,6 +438,7 @@ void __weak emif_get_ext_phy_ctrl_const_regs(u32 emif_nr,
                }
                break;
        case DRA722_ES1_0:
+       case DRA722_ES2_0:
                *regs = dra_ddr3_ext_phy_ctrl_const_base_666MHz;
                *size = ARRAY_SIZE(dra_ddr3_ext_phy_ctrl_const_base_666MHz);
                break;
@@ -670,6 +671,7 @@ const struct read_write_regs *get_bug_regs(u32 *iterations)
        case DRA752_ES1_1:
        case DRA752_ES2_0:
        case DRA722_ES1_0:
+       case DRA722_ES2_0:
                bug_00339_regs_ptr = dra_bug_00339_regs;
                *iterations = sizeof(dra_bug_00339_regs)/
                             sizeof(dra_bug_00339_regs[0]);
diff --git a/arch/arm/include/asm/arch-omap5/omap.h 
b/arch/arm/include/asm/arch-omap5/omap.h
index b5b3838f4500..1eeb8d5f626f 100644
--- a/arch/arm/include/asm/arch-omap5/omap.h
+++ b/arch/arm/include/asm/arch-omap5/omap.h
@@ -60,6 +60,7 @@
 #define DRA752_CONTROL_ID_CODE_ES1_1           0x1B99002F
 #define DRA752_CONTROL_ID_CODE_ES2_0           0x2B99002F
 #define DRA722_CONTROL_ID_CODE_ES1_0           0x0B9BC02F
+#define DRA722_CONTROL_ID_CODE_ES2_0           0x1B9BC02F
 
 /* UART */
 #define UART1_BASE             (OMAP54XX_L4_PER_BASE + 0x6a000)
diff --git a/arch/arm/include/asm/omap_common.h 
b/arch/arm/include/asm/omap_common.h
index aef31266ce9e..8c85f46db6ef 100644
--- a/arch/arm/include/asm/omap_common.h
+++ b/arch/arm/include/asm/omap_common.h
@@ -700,6 +700,7 @@ static inline u8 is_dra72x(void)
 #define DRA752_ES1_1   0x07520110
 #define DRA752_ES2_0   0x07520200
 #define DRA722_ES1_0   0x07220100
+#define DRA722_ES2_0   0x07220200
 
 /*
  * SRAM scratch space entries
-- 
1.7.9.5

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