On 03/21/2016 12:26 PM, Alexander Graf wrote:
> With commit 7985cdf we converted all systems except for the Layerscape
> SoCs to the generic descriptor table based page table setup.
>
> On the Layerscape SoCs however, we just provide an empty table stub
> and do the setup ourselves. To reserve enough memory for the tables,
> we need to override the default counting mechanism which would end up
> with an empty table because we have no maps.
>
> Fixes: 7985cdf
> Reported-by: York Sun <york....@nxp.com>
> CC: Alison Wang <alison.w...@nxp.com>
> CC: Prabhakar Kushwaha <prabhakar.kushw...@nxp.com>
> Signed-off-by: Alexander Graf <ag...@suse.de>
> ---
> arch/arm/cpu/armv8/cache_v8.c | 2 +-
> arch/arm/cpu/armv8/fsl-layerscape/cpu.c | 5 +++++
> 2 files changed, 6 insertions(+), 1 deletion(-)
>
> diff --git a/arch/arm/cpu/armv8/cache_v8.c b/arch/arm/cpu/armv8/cache_v8.c
> index d1bd06b..1615542 100644
> --- a/arch/arm/cpu/armv8/cache_v8.c
> +++ b/arch/arm/cpu/armv8/cache_v8.c
> @@ -320,7 +320,7 @@ static int count_required_pts(u64 addr, int level, u64
> maxaddr)
> }
>
> /* Returns the estimated required size of all page tables */
> -u64 get_page_table_size(void)
> +__weak u64 get_page_table_size(void)
> {
> u64 one_pt = MAX_PTE_ENTRIES * sizeof(u64);
> u64 size = 0;
> diff --git a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
> b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
> index 7404bd9..4b9e209 100644
> --- a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
> +++ b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
> @@ -410,6 +410,11 @@ static inline void final_mmu_setup(void)
> */
> }
>
> +u64 get_page_table_size(void)
> +{
> + return 0x10000;
> +}
> +
> int arch_cpu_init(void)
> {
> icache_enable();
>
Tested-by: York Sun <york....@nxp.com>
Reviewed-by: York Sun <york....@nxp.com>
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