> -------- Original Message -------- > Subject: [PATCH] arm: Fix order of CSU indexes in ns_access.h > Date: 03/29/2016 12:41 AM > From: Vincent Siles <vincent.si...@provenrun.com> > To: u-boot@lists.denx.de <u-boot@lists.denx.de> > CC: vincent.si...@provenrun.com <vincent.si...@provenrun.com>, > york...@freescale.com <york...@freescale.com>, Mingkai Hu > <mingkai...@freescale.com>, Gong Qianyu <qianyu.g...@freescale.com>, > Albert Aribaud <albert.u.b...@aribaud.net>, Hou Zhiqiang > <b48...@freescale.com> > > This patch aims to fix the order of CSU slave index for the LS1021a > board. > > Signed-off-by: Vincent Siles <vincent.si...@provenrun.com> > > --- > > arch/arm/include/asm/arch-ls102xa/ns_access.h | 6 +++--- > 1 file changed, 3 insertions(+), 3 deletions(-) > > diff --git a/arch/arm/include/asm/arch-ls102xa/ns_access.h > b/arch/arm/include/asm/arch-ls102xa/ns_access.h > index a921fb6..44acfd2 100644 > --- a/arch/arm/include/asm/arch-ls102xa/ns_access.h > +++ b/arch/arm/include/asm/arch-ls102xa/ns_access.h > @@ -82,12 +82,12 @@ enum csu_cslx_ind { > CSU_CSLX_FTM5, > CSU_CSLX_FTM8, > CSU_CSLX_FTM7, > - CSU_CSLX_COP_DCSR, > CSU_CSLX_EPU, > - CSU_CSLX_GDI, > + CSU_CSLX_COP_DCSR, > CSU_CSLX_DDI, > + CSU_CSLX_GDI, > CSU_CSLX_RESERVED1, > - CSU_CSLX_USB3_PHY = 117, > + CSU_CSLX_USB3_PHY = 116, > CSU_CSLX_RESERVED2, > CSU_CSLX_MAX, > }; > -- Reviewed-by: Alison Wang <alison.w...@nxp.com>
Best Regards, Alison Wang _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot