On 05/04/2016 09:04 PM, Pavel Machek wrote: > Hi! > >> The indirect write code is buggy pile of nastiness which fails horribly >> when the system runs fast enough to saturate the controller. The failure >> results in some pages (256B) not being written to the flash. This can be >> observed on systems which run with Dcache enabled and L2 cache enabled, >> like the Altera SoCFPGA. >> >> This patch replaces the whole unmaintainable indirect write implementation >> with the one from upcoming Linux CQSPI driver, which went through multiple >> rounds of thorough review and testing. While this makes the patch look >> terrifying and violates all best-practices of software development, all >> the patch does is it plucks out duplicate ad-hoc code distributed across >> the driver and replaces it with more compact code doing exactly the same >> thing. > > Ok, sorry, I still don't understand the changelog. > > First, it describes the bug with L2 cache enabled, but then it says > that "all the patch does .. doing exactly the same thing". > > So I assume it does not do the same thing, but replaces duplicated > code in u-boot with working code from Linux?
Ah right, the linux code also does FIFO level checking, so it doesn't overflow during the writes. > Thanks for doing this, > Pavel > > -- Best regards, Marek Vasut _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
