Paulraj, Sandeep wrote: >> v7_flush_dcache_all, because it depends on omap ROM code is not >> generic. Rename the function to 'invalidate_dcache' and move it >> to the omap cpu directory. >> >> Collect the other omap cache routines l2_cache_enable and >> l2_cache_disable with invalide_dcache into cache.S. This >> means removing the old cache.c file that contained l2_cache_enable >> and l2_cache_disable. >> >> The conversion from cache.c to cache.S was done most through >> disassembling the uboot binary. The only significant change was >> to change the comparision for the return of get_cpu_rev from >> >> cmp r0, #0 >> beq earlier_than_label >> >> Which was lost information to >> >> cmp r0, #CPU_3XX_ES20 >> blt earlier_than_label >> >> The paths through the enable routine were verified by >> adding an infinite loop and seeing the hang. Then >> removing the infinite loop and seeing it continue. >> >> The disable routine is similar enough that it was not >> tested with this method. >> >> Run tested by cold booting from nand on beagle and zoom1. >> Compile tested on MAKEALL arm. >> >> Signed-off-by: Tom Rix <tom....@windriver.com> >> --- >> cpu/arm_cortexa8/cpu.c | 2 +- >> cpu/arm_cortexa8/omap3/Makefile | 2 +- >> cpu/arm_cortexa8/omap3/board.c | 2 +- >> cpu/arm_cortexa8/omap3/cache.S | 191 >> ++++++++++++++++++++++++++++++++ >> cpu/arm_cortexa8/omap3/cache.c | 95 ---------------- >> cpu/arm_cortexa8/start.S | 85 -------------- >> include/asm-arm/arch-omap3/omap3.h | 2 + >> include/asm-arm/arch-omap3/sys_proto.h | 2 +- >> 8 files changed, 197 insertions(+), 184 deletions(-) >> create mode 100644 cpu/arm_cortexa8/omap3/cache.S >> delete mode 100644 cpu/arm_cortexa8/omap3/cache.c > > Applied to u-boot-ti > > -Sandeep
Thanks! I am traveling tomorrow and I will pull it this weekend. Tom _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot