On Monday 25 July 2016 03:45 PM, Vignesh R wrote:
> From: Lokesh Vutla <lokeshvu...@ti.com>
> 
> According to AM572x DM SPRS953A, QSPI bus speed can be 76.8MHz, hence
> update QSPI input clock divider value (DPLL_PER_HS13) to provide 76.8MHz
> clock, so that driver can use the same.
> 
> Signed-off-by: Vignesh R <vigne...@ti.com>
> ---

Reviewed-by: Mugunthan V N <mugunthan...@ti.com>

Regards
Mugunthan V N


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