Hi Alex,
On Tuesday 02 August 2016 07:24 AM, Keerthy wrote:
On Tuesday 02 August 2016 03:16 AM, Alexander Graf wrote:
On 01 Aug 2016, at 11:07, Keerthy <a0393...@ti.com> wrote:
Hi Alexander,
I am trying to enable hypervisor in u-boot for DRA7(A15 based) family
of SoCs which does not have LPAE support yet.
Is it mandatory for LPAE to be enabled before enabling hypervisor for
A15?
HYP mode shares the same page table layout as the LPAE one. I’m
actually surprised you managed to configure an A15 without LPAE. Are
you sure it doesn’t support it?
I meant CONFIG_LPAE not enabled yet in our defconfig. I was trying to
get hyp mode enabled and saw that enabling LPAE config seemed mandatory
as per your commit.
I am referring
http://liris.cnrs.fr/~mmrissa/lib/exe/fetch.php?media=armv7-a-r-manual.pdf.
Attrm[3:0] bits for DCACHE_WRITEALLOC, DCACHE_WRITEBACK,
DCACHE_WRITETHROUGH definitions.
DCACHE_WRITEBACK should have 0x3 << 2 to get 11RW for MAIRn.Attrm[3:0]
encoding.
Correct me if i am wrong of referring a wrong document.
Regards,
Keerthy
Alex
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