While both options are acceptable use P1 area physical addresses
instead of external memory space of text base and PCI system memory
for unification purposes, all other supported superh boards have the
same selection.

This allows to easily ensure that CONFIG_SYS_TEXT_BASE is located
within available DRAM.

Signed-off-by: Vladimir Zapolskiy <v...@mleia.com>
---
 include/configs/r2dplus.h | 10 +++++-----
 1 file changed, 5 insertions(+), 5 deletions(-)

diff --git a/include/configs/r2dplus.h b/include/configs/r2dplus.h
index 4d51a0c..d9b116a 100644
--- a/include/configs/r2dplus.h
+++ b/include/configs/r2dplus.h
@@ -26,10 +26,10 @@
 #define CONFIG_ENV_OVERWRITE   1
 
 /* SDRAM */
-#define CONFIG_SYS_SDRAM_BASE          (0x8C000000)
-#define CONFIG_SYS_SDRAM_SIZE          (0x04000000)
+#define CONFIG_SYS_SDRAM_BASE          0x8C000000
+#define CONFIG_SYS_SDRAM_SIZE          0x04000000
 
-#define CONFIG_SYS_TEXT_BASE   0x0FFC0000
+#define CONFIG_SYS_TEXT_BASE           0x8FFC0000
 #define CONFIG_SYS_LONGHELP
 #define CONFIG_SYS_CBSIZE              256
 #define CONFIG_SYS_PBSIZE              256
@@ -101,8 +101,8 @@
 #define CONFIG_PCI_IO_BUS      0xFE240000      /* IO space base address */
 #define CONFIG_PCI_IO_PHYS     CONFIG_PCI_IO_BUS
 #define CONFIG_PCI_IO_SIZE     0x00040000      /* Size of IO window */
-#define CONFIG_PCI_SYS_BUS     (CONFIG_SYS_SDRAM_BASE & 0x1fffffff)
-#define CONFIG_PCI_SYS_PHYS    (CONFIG_SYS_SDRAM_BASE & 0x1fffffff)
+#define CONFIG_PCI_SYS_BUS     CONFIG_SYS_SDRAM_BASE
+#define CONFIG_PCI_SYS_PHYS    CONFIG_SYS_SDRAM_BASE
 #define CONFIG_PCI_SYS_SIZE    CONFIG_SYS_SDRAM_SIZE
 
 #endif /* __CONFIG_H */
-- 
2.8.1

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