Move this config to Kconfig option and clean up existing uses.
Signed-off-by: York Sun <york....@nxp.com>
CC: Calvin Johnson <calvin.john...@nxp.com>
CC: Prabhakar Kushwaha <prabhakar.kushw...@nxp.com>
Reviewed-by: Tom Rini <tr...@konsulko.com>
---
Changes in v2: None
arch/arm/Kconfig | 3 +++
arch/arm/cpu/armv8/fsl-layerscape/Kconfig | 7 +++++++
arch/arm/cpu/armv8/fsl-layerscape/Makefile | 2 +-
arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_speed.c | 4 ++--
arch/arm/include/asm/arch-fsl-layerscape/config.h | 6 ++----
arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h | 2 +-
include/configs/ls1012a_common.h | 1 -
include/linux/usb/xhci-fsl.h | 2 +-
8 files changed, 17 insertions(+), 10 deletions(-)
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index aed89c9..c974db4 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -788,6 +788,7 @@ config TARGET_HIKEY
config TARGET_LS1012AQDS
bool "Support ls1012aqds"
+ select ARCH_LS1012A
select ARM64
help
Support for Freescale LS1012AQDS platform.
@@ -797,6 +798,7 @@ config TARGET_LS1012AQDS
config TARGET_LS1012ARDB
bool "Support ls1012ardb"
+ select ARCH_LS1012A
select ARM64
help
Support for Freescale LS1012ARDB platform.
@@ -806,6 +808,7 @@ config TARGET_LS1012ARDB
config TARGET_LS1012AFRDM
bool "Support ls1012afrdm"
+ select ARCH_LS1012A
select ARM64
help
Support for Freescale LS1012AFRDM platform.
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
index c234eff..a823d39 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
+++ b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
@@ -1,2 +1,9 @@
+config ARCH_LS1012A
+ bool "Freescale Layerscape LS1012A SoC"
+ select SYS_FSL_MMDC
+
config ARCH_LS1046A
bool "Freescale Layerscape LS1046A SoC"
+
+config SYS_FSL_MMDC
+ bool "Freescale Multi Mode DDR Controller"
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Makefile
b/arch/arm/cpu/armv8/fsl-layerscape/Makefile
index f9590af..51c1cee 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/Makefile
+++ b/arch/arm/cpu/armv8/fsl-layerscape/Makefile
@@ -30,7 +30,7 @@ ifneq ($(CONFIG_LS1043A),)
obj-$(CONFIG_SYS_HAS_SERDES) += ls1043a_serdes.o
endif
-ifneq ($(CONFIG_LS1012A),)
+ifneq ($(CONFIG_ARCH_LS1012A),)
obj-$(CONFIG_SYS_HAS_SERDES) += ls1012a_serdes.o
endif
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_speed.c
b/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_speed.c
index 8922197..55005f0 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_speed.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_speed.c
@@ -60,7 +60,7 @@ void get_sys_info(struct sys_info *sys_info)
sys_info->freq_ddrbus = sysclk;
#endif
-#ifdef CONFIG_LS1012A
+#ifdef CONFIG_ARCH_LS1012A
sys_info->freq_ddrbus *= (gur_in32(&gur->rcwsr[0]) >>
FSL_CHASSIS2_RCWSR0_SYS_PLL_RAT_SHIFT) &
FSL_CHASSIS2_RCWSR0_SYS_PLL_RAT_MASK;
@@ -91,7 +91,7 @@ void get_sys_info(struct sys_info *sys_info)
freq_c_pll[cplx_pll] / core_cplx_pll_div[c_pll_sel];
}
-#ifdef CONFIG_LS1012A
+#ifdef CONFIG_ARCH_LS1012A
sys_info->freq_systembus = sys_info->freq_ddrbus / 2;
sys_info->freq_ddrbus *= 2;
#endif
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/config.h
b/arch/arm/include/asm/arch-fsl-layerscape/config.h
index e7c7d98..a7fda18 100644
--- a/arch/arm/include/asm/arch-fsl-layerscape/config.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/config.h
@@ -18,9 +18,7 @@
#define CONFIG_SYS_FSL_DDRC_ARM_GEN3 /* Enable Freescale ARM DDR3 driver */
#endif
-#ifdef CONFIG_LS1012A
-#define CONFIG_SYS_FSL_MMDC /* Freescale MMDC driver */
-#else
+#ifndef CONFIG_ARCH_LS1012A
#define CONFIG_SYS_FSL_DDR /* Freescale DDR driver */
#define CONFIG_SYS_FSL_DDR_VER FSL_DDR_VER_5_0
#endif
@@ -208,7 +206,7 @@
#define CONFIG_SYS_FSL_ERRATUM_A009942
#define CONFIG_SYS_FSL_ERRATUM_A009660
#define CONFIG_SYS_FSL_MAX_NUM_OF_SEC 1
-#elif defined(CONFIG_LS1012A)
+#elif defined(CONFIG_ARCH_LS1012A)
#define CONFIG_MAX_CPUS 1
#undef CONFIG_SYS_FSL_DDRC_ARM_GEN3
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h
b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h
index 95a4293..df51871 100644
--- a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h
@@ -60,7 +60,7 @@
#define CONFIG_SYS_PCIE2_PHYS_ADDR 0x4800000000ULL
#define CONFIG_SYS_PCIE3_PHYS_ADDR 0x5000000000ULL
/* LUT registers */
-#ifdef CONFIG_LS1012A
+#ifdef CONFIG_ARCH_LS1012A
#define PCIE_LUT_BASE 0xC0000
#else
#define PCIE_LUT_BASE 0x10000
diff --git a/include/configs/ls1012a_common.h b/include/configs/ls1012a_common.h
index fba2fac..5fb6c47 100644
--- a/include/configs/ls1012a_common.h
+++ b/include/configs/ls1012a_common.h
@@ -9,7 +9,6 @@
#define CONFIG_FSL_LAYERSCAPE
#define CONFIG_FSL_LSCH2
-#define CONFIG_LS1012A
#define CONFIG_GICV2
#define CONFIG_SYS_HAS_SERDES
diff --git a/include/linux/usb/xhci-fsl.h b/include/linux/usb/xhci-fsl.h
index 199f366..d04e3cc 100644
--- a/include/linux/usb/xhci-fsl.h
+++ b/include/linux/usb/xhci-fsl.h
@@ -51,7 +51,7 @@ struct fsl_xhci {
struct dwc3 *dwc3_reg;
};
-#if defined(CONFIG_LS102XA) || defined(CONFIG_LS1012A)
+#if defined(CONFIG_LS102XA) || defined(CONFIG_ARCH_LS1012A)
#define CONFIG_SYS_FSL_XHCI_USB1_ADDR CONFIG_SYS_XHCI_USB1_ADDR
#define CONFIG_SYS_FSL_XHCI_USB2_ADDR 0
#define CONFIG_SYS_FSL_XHCI_USB3_ADDR 0
--
2.7.4
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