On Tue, Oct 04, 2016 at 07:21:08AM +0200, Heiko Schocher wrote: > Hello Joe, Tom, > > Am 02.10.2016 um 14:06 schrieb Joe Hershberger: > >Hi Tom, > > > >On Sun, Oct 2, 2016 at 7:03 AM, Tom Rini <tr...@konsulko.com> wrote: > >>On Mon, Aug 29, 2016 at 07:46:47AM +0200, Heiko Schocher wrote: > >> > >>>when using tftp on the smartweb board, it prints, when > >>>using the tftp command: > >>> > >>>Using ethernet@fffc4000 device > >>>TFTP from server 192.168.1.1; our IP address is 192.168.20.80 > >>>Filename '/tftpboot/smartweb_hw/tbot/u-boot.bin'. > >>>Load address: 0x21000000 > >>>Loading: ########################### > >>> 73.2 KiB/s > >>>done > >>>Bytes transferred = 391560 (5f988 hex) > >>>CACHE: Misaligned operation at range [21000000, 2105f988] > >>>U-Boot# > >>> > >>>Fixing this. > >>> > >>>Signed-off-by: Heiko Schocher <h...@denx.de> > >> > >>NAK, we need to sort out: > >> xtensa: + xtfpga > >> avr32: + atngw100mkii grasshopper atstk1002 atngw100 > >> sparc: + gr_cpci_ax2000 gr_xc3s_1500 gr_ep2s60 > >>microblaze: + microblaze-generic > >> > >>Lacking a define for CONFIG_SYS_CACHELINE_SIZE first. > > > >https://patchwork.ozlabs.org/patch/669691/ > > > >...is the approach I prefer to take instead of this patch. > > Yep, I already acked this patch, thanks!
OK. Then please try and either NAK in email, or modify in patchwork so I don't miss things. Thanks! -- Tom
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