Move these options to Kconfig and clean up existing uses.

Signed-off-by: York Sun <york....@nxp.com>
Reviewed-by: Simon Glass <s...@chromium.org>
---

Changes in v2: None

 arch/arm/cpu/armv7/ls102xa/Kconfig                | 11 +++++++++++
 arch/arm/cpu/armv8/fsl-layerscape/Kconfig         | 16 ++++++++++++++++
 arch/arm/include/asm/arch-fsl-layerscape/config.h |  5 -----
 arch/arm/include/asm/arch-ls102xa/config.h        |  2 --
 include/configs/ls1012a_common.h                  |  2 --
 include/configs/ls1021aqds.h                      |  2 --
 include/configs/ls1021atwr.h                      |  2 --
 include/configs/ls1043a_common.h                  |  3 ---
 include/configs/ls1043aqds.h                      |  2 --
 include/configs/ls1046a_common.h                  |  3 ---
 include/configs/ls1046aqds.h                      |  2 --
 include/configs/ls2080a_common.h                  |  3 ---
 12 files changed, 27 insertions(+), 26 deletions(-)

diff --git a/arch/arm/cpu/armv7/ls102xa/Kconfig 
b/arch/arm/cpu/armv7/ls102xa/Kconfig
index 88983f4..17f1975 100644
--- a/arch/arm/cpu/armv7/ls102xa/Kconfig
+++ b/arch/arm/cpu/armv7/ls102xa/Kconfig
@@ -1,6 +1,8 @@
 config ARCH_LS1021A
        bool
        select SYS_FSL_ERRATUM_A010315
+       select SYS_FSL_SRDS_1
+       select SYS_HAS_SERDES
 
 menu "LS102xA architecture"
        depends on ARCH_LS1021A
@@ -23,6 +25,15 @@ config MAX_CPUS
 config SYS_FSL_ERRATUM_A010315
        bool "Workaround for PCIe erratum A010315"
 
+config SYS_FSL_SRDS_1
+       bool
+
+config SYS_FSL_SRDS_2
+       bool
+
+config SYS_HAS_SERDES
+       bool
+
 config SYS_FSL_IFC_BANK_COUNT
        int "Maximum banks of Integrated flash controller"
        depends on ARCH_LS1021A
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig 
b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
index f683a14..66e509e 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
+++ b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
@@ -12,16 +12,23 @@ config ARCH_LS1043A
 config ARCH_LS1046A
        bool
        select FSL_LSCH2
+       select SYS_FSL_SRDS_2
 
 config ARCH_LS2080A
        bool
        select FSL_LSCH3
+       select SYS_FSL_HAS_DP_DDR
+       select SYS_FSL_SRDS_2
 
 config FSL_LSCH2
        bool
+       select SYS_FSL_SRDS_1
+       select SYS_HAS_SERDES
 
 config FSL_LSCH3
        bool
+       select SYS_FSL_SRDS_1
+       select SYS_HAS_SERDES
 
 menu "Layerscape architecture"
        depends on FSL_LSCH2 || FSL_LSCH3
@@ -60,4 +67,13 @@ config SYS_FSL_IFC_BANK_COUNT
 config SYS_FSL_HAS_DP_DDR
        bool
 
+config SYS_FSL_SRDS_1
+       bool
+
+config SYS_FSL_SRDS_2
+       bool
+
+config SYS_HAS_SERDES
+       bool
+
 endmenu
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/config.h 
b/arch/arm/include/asm/arch-fsl-layerscape/config.h
index 6ee75cb..3039e72 100644
--- a/arch/arm/include/asm/arch-fsl-layerscape/config.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/config.h
@@ -32,8 +32,6 @@
 #ifdef CONFIG_LS2080A
 #define CONFIG_SYS_FSL_CLUSTER_CLOCKS          { 1, 1, 4, 4 }
 #define        SRDS_MAX_LANES  8
-#define CONFIG_SYS_FSL_SRDS_1
-#define CONFIG_SYS_FSL_SRDS_2
 #define CONFIG_SYS_PAGE_SIZE           0x10000
 #ifndef L1_CACHE_BYTES
 #define L1_CACHE_SHIFT         6
@@ -162,8 +160,6 @@
 #define CONFIG_SYS_FSL_PEX_LUT_BE
 #define CONFIG_SYS_FSL_SEC_BE
 
-#define CONFIG_SYS_FSL_SRDS_1
-
 /* SoC related */
 #ifdef CONFIG_LS1043A
 #define CONFIG_SYS_FMAN_V3
@@ -212,7 +208,6 @@
 #define CONFIG_SYS_DDR_BLOCK1_SIZE  ((phys_size_t)2 << 30)
 #define CONFIG_MAX_MEM_MAPPED           CONFIG_SYS_DDR_BLOCK1_SIZE
 
-#define CONFIG_SYS_FSL_SRDS_2
 #define CONFIG_SYS_FSL_IFC_BE
 #define CONFIG_SYS_FSL_SFP_VER_3_2
 #define CONFIG_SYS_FSL_SNVS_LE
diff --git a/arch/arm/include/asm/arch-ls102xa/config.h 
b/arch/arm/include/asm/arch-ls102xa/config.h
index 70cc703..dfcb546 100644
--- a/arch/arm/include/asm/arch-ls102xa/config.h
+++ b/arch/arm/include/asm/arch-ls102xa/config.h
@@ -120,8 +120,6 @@
 
 #define DCU_LAYER_MAX_NUM                      16
 
-#define CONFIG_SYS_FSL_SRDS_1
-
 #ifdef CONFIG_LS102XA
 #define CONFIG_SYS_FSL_IFC_BANK_COUNT          8
 #define CONFIG_NUM_DDR_CONTROLLERS             1
diff --git a/include/configs/ls1012a_common.h b/include/configs/ls1012a_common.h
index 1056755..ced8ead 100644
--- a/include/configs/ls1012a_common.h
+++ b/include/configs/ls1012a_common.h
@@ -10,8 +10,6 @@
 #define CONFIG_FSL_LAYERSCAPE
 #define CONFIG_GICV2
 
-#define        CONFIG_SYS_HAS_SERDES
-
 #include <asm/arch/config.h>
 #define CONFIG_SYS_NO_FLASH
 
diff --git a/include/configs/ls1021aqds.h b/include/configs/ls1021aqds.h
index 0d72e69..5ff3db6 100644
--- a/include/configs/ls1021aqds.h
+++ b/include/configs/ls1021aqds.h
@@ -143,8 +143,6 @@ unsigned long get_board_ddr_clk(void);
 #define CONFIG_MEM_INIT_VALUE           0xdeadbeef
 #endif
 
-#define CONFIG_SYS_HAS_SERDES
-
 #define CONFIG_FSL_CAAM                        /* Enable CAAM */
 
 #if !defined(CONFIG_SD_BOOT) && !defined(CONFIG_NAND_BOOT) && \
diff --git a/include/configs/ls1021atwr.h b/include/configs/ls1021atwr.h
index e5ac50e..67b43c6 100644
--- a/include/configs/ls1021atwr.h
+++ b/include/configs/ls1021atwr.h
@@ -170,8 +170,6 @@
 #define CONFIG_SYS_DDR_SDRAM_BASE      0x80000000UL
 #define CONFIG_SYS_SDRAM_BASE          CONFIG_SYS_DDR_SDRAM_BASE
 
-#define CONFIG_SYS_HAS_SERDES
-
 #define CONFIG_FSL_CAAM                        /* Enable CAAM */
 
 #if !defined(CONFIG_SD_BOOT) && !defined(CONFIG_NAND_BOOT) && \
diff --git a/include/configs/ls1043a_common.h b/include/configs/ls1043a_common.h
index ac86c08..3a85b6a 100644
--- a/include/configs/ls1043a_common.h
+++ b/include/configs/ls1043a_common.h
@@ -15,9 +15,6 @@
 #define CONFIG_GICV2
 
 #include <asm/arch/config.h>
-#ifdef CONFIG_SYS_FSL_SRDS_1
-#define        CONFIG_SYS_HAS_SERDES
-#endif
 
 /* Link Definitions */
 #define CONFIG_SYS_INIT_SP_ADDR                (CONFIG_SYS_FSL_OCRAM_BASE + 
0xfff0)
diff --git a/include/configs/ls1043aqds.h b/include/configs/ls1043aqds.h
index a80e33d..b18fcc0 100644
--- a/include/configs/ls1043aqds.h
+++ b/include/configs/ls1043aqds.h
@@ -52,8 +52,6 @@ unsigned long get_board_ddr_clk(void);
 #define CONFIG_MEM_INIT_VALUE           0xdeadbeef
 #endif
 
-#define CONFIG_SYS_HAS_SERDES
-
 #ifdef CONFIG_SYS_DPAA_FMAN
 #define CONFIG_FMAN_ENET
 #define CONFIG_PHYLIB
diff --git a/include/configs/ls1046a_common.h b/include/configs/ls1046a_common.h
index ec6c908..c4bbd56 100644
--- a/include/configs/ls1046a_common.h
+++ b/include/configs/ls1046a_common.h
@@ -14,9 +14,6 @@
 #define CONFIG_GICV2
 
 #include <asm/arch/config.h>
-#ifdef CONFIG_SYS_FSL_SRDS_1
-#define        CONFIG_SYS_HAS_SERDES
-#endif
 
 /* Link Definitions */
 #define CONFIG_SYS_INIT_SP_ADDR                (CONFIG_SYS_FSL_OCRAM_BASE + 
0xfff0)
diff --git a/include/configs/ls1046aqds.h b/include/configs/ls1046aqds.h
index 2e5c2f1..d1adf3f 100644
--- a/include/configs/ls1046aqds.h
+++ b/include/configs/ls1046aqds.h
@@ -49,8 +49,6 @@ unsigned long get_board_ddr_clk(void);
 #define CONFIG_MEM_INIT_VALUE           0xdeadbeef
 #endif
 
-#define CONFIG_SYS_HAS_SERDES
-
 /* DSPI */
 #ifdef CONFIG_FSL_DSPI
 #define CONFIG_SPI_FLASH_STMICRO       /* cs0 */
diff --git a/include/configs/ls2080a_common.h b/include/configs/ls2080a_common.h
index d9eea09..187aee1 100644
--- a/include/configs/ls2080a_common.h
+++ b/include/configs/ls2080a_common.h
@@ -15,9 +15,6 @@
 
 #include <asm/arch/ls2080a_stream_id.h>
 #include <asm/arch/config.h>
-#if (defined(CONFIG_SYS_FSL_SRDS_1) || defined(CONFIG_SYS_FSL_SRDS_2))
-#define        CONFIG_SYS_HAS_SERDES
-#endif
 
 /* Link Definitions */
 #define CONFIG_SYS_INIT_SP_ADDR                (CONFIG_SYS_FSL_OCRAM_BASE + 
0xfff0)
-- 
2.7.4

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