On 10/16/2016 10:35 PM, Prabhakar Kushwaha wrote: > Hi Mingkai, > >> -----Original Message----- >> From: Pratiyush Srivastava [mailto:pratiyush.srivast...@nxp.com] >> Sent: Wednesday, October 12, 2016 5:46 PM >> To: u-boot@lists.denx.de >> Cc: york sun <york....@nxp.com>; Prabhakar Kushwaha >> <prabhakar.kushw...@nxp.com>; Pratiyush Srivastava >> <pratiyush.srivast...@nxp.com>; Hou Zhiqiang <zhiqiang....@freescale.com> >> Subject: [PATCH] armv8/ls1043a: Add the OCRAM initialization >> >> Clear the content to zero and the ECC error bit of OCRAM1/2. >> >> The OCRAM must be initialized to ZERO by the unit of 8-Byte before >> accessing it, or else it will generate ECC error. And the IBR has >> accessed the OCRAM before this initialization, so the ECC error >> status bit should to be cleared. >> >> Signed-off-by: Pratiyush Srivastava <pratiyush.srivast...@nxp.com> >> Signed-off-by: Hou Zhiqiang <zhiqiang....@freescale.com> >> Signed-off-by: Prabhakar Kushwaha <prabhakar.kushw...@nxp.com> >> --- > > This requirement is for both ls1043 and ls1088a. was this patch taken care > during ls1043a upstreaming > If not, how it is being taken care for ls1043a. Same approach can be used > for ls1088a >
I wonder why we don't see ECC errors before this patch. We have LS1043A boots on NAND, SD. York _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot