On Mon, Oct 31, 2016 at 10:48 AM, Stephen Warren <swar...@wwwdotorg.org> wrote: > On 10/21/2016 02:46 PM, Stephen Warren wrote: >> >> From: Stephen Warren <swar...@nvidia.com> >> >> This driver supports the Synopsys Designware Ethernet QoS (Quality of >> Service) a/k/a eqos IP block, which is a different design than the HW >> supported by the existing designware.c driver. The IP supports many >> options for bus type, clocking/reset structure, and feature list. This >> driver currently supports the specific configuration used in NVIDIA's >> Tegra186 chip, but should be extensible to other combinations quite >> easily, as explained in the source. >> >> Signed-off-by: Stephen Warren <swar...@nvidia.com> >> Reviewed-by: Simon Glass <s...@chromium.org> # V1 >> --- >> v3: >> * Use structs to describe register layout. >> * Implement write_hwaddr(). This requires tracking whether registers are >> accessible and knowing for which configurations this matters. >> * Add full description of Tegra186 HW block configuration. >> * s/tegra/tegra186/ in symbol names. >> * Use a single struct type for all descriptors, with field names that >> match the HW documentation. > > > Joe, does this new version look good? I believe it addresses all your > previous comments. Thanks.
Hi Stephen, Apologies, I haven't gotten back to reviewing this... I'll try to get to it today or tomorrow. -Joe _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot