On 11/03/2016 02:36 AM, Andre Przywara wrote:
These days many Allwinner SoCs use clock_sun6i.c, although out of them
only the (original sun6i) A31 has a second MBUS clock register.
Also setting up the PRCM PLL_CTLR1 register to provide the proper voltage
seems to be an A31-only feature as well.
So restrict the initialization to this SoC only to avoid writing bogus
values to (undefined) registers in other chips.

Signed-off-by: Andre Przywara <andre.przyw...@arm.com>

Reviewed-by: Alexander Graf <ag...@suse.de>

(However I haven't counter-checked with specs)


Alex

_______________________________________________
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot

Reply via email to