Hi Andre, On 2 November 2016 at 19:36, Andre Przywara <andre.przyw...@arm.com> wrote: > The ARMv8 capable Allwinner A64 SoC comes out of reset in AArch32 mode. > To run AArch64 code, we have to trigger a warm reset via the RMR register, > which proceeds with code execution at the address stored in the RVBAR > register. > If the bootable payload in the FIT image is using a different > architecture than the SPL has been compiled for, enter it via this said > RMR switch mechanism, by writing the entry point address into the MMIO > mapped, writable version of the RVBAR register. > Then the warm reset is triggered via a system register write. > If the payload architecture is the same as the SPL, we use the normal > branch as usual. > > Signed-off-by: Andre Przywara <andre.przyw...@arm.com> > --- > arch/arm/lib/spl.c | 14 ++++++++++
I think the changes to this file should go in a separate patch as they are generic to ARM. > arch/arm/mach-sunxi/Makefile | 1 + > arch/arm/mach-sunxi/spl_switch.c | 60 > ++++++++++++++++++++++++++++++++++++++++ > 3 files changed, 75 insertions(+) > create mode 100644 arch/arm/mach-sunxi/spl_switch.c [...] Regards, Simon _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
