On 30.11.2016 01:32, Simon Glass wrote: > Hi Michal, > > On 25 November 2016 at 08:00, Michal Simek <michal.si...@xilinx.com> wrote: >> This patch also includes ARM64 zynqmp changes: >> - Remove platform non DM initialization >> - Remove hardcoded sata base address >> >> Signed-off-by: Michal Simek <michal.si...@xilinx.com> >> --- >> >> Changes in v2: >> - make ceva_init_sata static >> - Move SATA_CEVA to defconfig >> - Initalized max_lun and max_id platdata >> >> arch/arm/include/asm/arch-zynqmp/hardware.h | 2 -- >> board/xilinx/zynqmp/zynqmp.c | 11 -------- >> configs/xilinx_zynqmp_ep_defconfig | 2 ++ >> configs/xilinx_zynqmp_zcu102_defconfig | 2 ++ >> configs/xilinx_zynqmp_zcu102_revB_defconfig | 2 ++ >> drivers/block/Kconfig | 6 +++++ >> drivers/block/sata_ceva.c | 41 >> +++++++++++++++++++++++++++-- >> include/configs/xilinx_zynqmp.h | 5 ++-- >> include/configs/xilinx_zynqmp_ep.h | 1 - >> include/configs/xilinx_zynqmp_zcu102.h | 2 -- >> 10 files changed, 54 insertions(+), 20 deletions(-) > > Reviewed-by: Simon Glass <s...@chromium.org> > > nits below > >> >> diff --git a/arch/arm/include/asm/arch-zynqmp/hardware.h >> b/arch/arm/include/asm/arch-zynqmp/hardware.h >> index e7738faaf896..d1970953e234 100644 >> --- a/arch/arm/include/asm/arch-zynqmp/hardware.h >> +++ b/arch/arm/include/asm/arch-zynqmp/hardware.h >> @@ -18,8 +18,6 @@ >> >> #define ARASAN_NAND_BASEADDR 0xFF100000 >> >> -#define ZYNQMP_SATA_BASEADDR 0xFD0C0000 >> - >> #define ZYNQMP_USB0_XHCI_BASEADDR 0xFE200000 >> #define ZYNQMP_USB1_XHCI_BASEADDR 0xFE300000 >> >> diff --git a/board/xilinx/zynqmp/zynqmp.c b/board/xilinx/zynqmp/zynqmp.c >> index cef1f6a13aee..a23c38acd99d 100644 >> --- a/board/xilinx/zynqmp/zynqmp.c >> +++ b/board/xilinx/zynqmp/zynqmp.c >> @@ -311,17 +311,6 @@ void reset_cpu(ulong addr) >> { >> } >> >> -#ifdef CONFIG_SCSI_AHCI_PLAT >> -void scsi_init(void) >> -{ >> -#if defined(CONFIG_SATA_CEVA) >> - init_sata(0); >> -#endif >> - ahci_init((void __iomem *)ZYNQMP_SATA_BASEADDR); >> - scsi_scan(1); >> -} >> -#endif >> - >> int board_late_init(void) >> { >> u32 reg = 0; >> diff --git a/configs/xilinx_zynqmp_ep_defconfig >> b/configs/xilinx_zynqmp_ep_defconfig >> index f3cdf90c1f73..8d6a6cf5701e 100644 >> --- a/configs/xilinx_zynqmp_ep_defconfig >> +++ b/configs/xilinx_zynqmp_ep_defconfig >> @@ -49,6 +49,8 @@ CONFIG_OF_EMBED=y >> CONFIG_NET_RANDOM_ETHADDR=y >> CONFIG_SPL_DM=y >> CONFIG_SPL_DM_SEQ_ALIAS=y >> +CONFIG_DM_SCSI=y >> +CONFIG_SATA_CEVA=y >> CONFIG_DFU_RAM=y >> CONFIG_FPGA_XILINX=y >> CONFIG_FPGA_ZYNQMPPL=y >> diff --git a/configs/xilinx_zynqmp_zcu102_defconfig >> b/configs/xilinx_zynqmp_zcu102_defconfig >> index fa6d6692040e..7e5e83fdc043 100644 >> --- a/configs/xilinx_zynqmp_zcu102_defconfig >> +++ b/configs/xilinx_zynqmp_zcu102_defconfig >> @@ -41,6 +41,8 @@ CONFIG_OF_EMBED=y >> CONFIG_NET_RANDOM_ETHADDR=y >> CONFIG_SPL_DM=y >> CONFIG_SPL_DM_SEQ_ALIAS=y >> +CONFIG_DM_SCSI=y >> +CONFIG_SATA_CEVA=y >> CONFIG_DFU_RAM=y >> CONFIG_FPGA_XILINX=y >> CONFIG_FPGA_ZYNQMPPL=y >> diff --git a/configs/xilinx_zynqmp_zcu102_revB_defconfig >> b/configs/xilinx_zynqmp_zcu102_revB_defconfig >> index a4af8024e454..f57705b2cba9 100644 >> --- a/configs/xilinx_zynqmp_zcu102_revB_defconfig >> +++ b/configs/xilinx_zynqmp_zcu102_revB_defconfig >> @@ -41,6 +41,8 @@ CONFIG_OF_EMBED=y >> CONFIG_NET_RANDOM_ETHADDR=y >> CONFIG_SPL_DM=y >> CONFIG_SPL_DM_SEQ_ALIAS=y >> +CONFIG_DM_SCSI=y >> +CONFIG_SATA_CEVA=y >> CONFIG_DFU_RAM=y >> CONFIG_FPGA_XILINX=y >> CONFIG_FPGA_ZYNQMPPL=y >> diff --git a/drivers/block/Kconfig b/drivers/block/Kconfig >> index 55edae71eec3..0b289b2fc111 100644 >> --- a/drivers/block/Kconfig >> +++ b/drivers/block/Kconfig >> @@ -34,3 +34,9 @@ config BLOCK_CACHE >> This is most useful when accessing filesystems under U-Boot since >> it will prevent repeated reads from directory structures and other >> filesystem data structures. >> + >> +config SATA_CEVA >> + bool "Ceva Sata controller" >> + depends on DM_SCSI >> + help >> + This option enables Ceva Sata controller available on Xilinx >> ZynqMP. > > Can you add more detail? What does it support? Is this soft IP?
Added config SATA_CEVA bool "Ceva Sata controller" depends on DM_SCSI help This option enables Ceva Sata controller hard IP available on Xilinx ZynqMP. Support up to 2 external devices. Complient with SATA 3.1 and AHCI 1.3 specifications with hot-plug detect feature. > >> diff --git a/drivers/block/sata_ceva.c b/drivers/block/sata_ceva.c >> index dcc3b90b17f1..3f40b7efb6fa 100644 >> --- a/drivers/block/sata_ceva.c >> +++ b/drivers/block/sata_ceva.c >> @@ -9,6 +9,7 @@ >> #include <ahci.h> >> #include <scsi.h> >> #include <asm/arch/hardware.h> >> +#include <dm.h> > > please put these in order with http://www.denx.de/wiki/U-Boot/CodingStyle Fixed. > >> >> #include <asm/io.h> >> >> @@ -73,10 +74,9 @@ >> #define DRV_NAME "ahci-ceva" >> #define CEVA_FLAG_BROKEN_GEN2 1 >> >> -int init_sata(int dev) >> +static int ceva_init_sata(ulong mmio) >> { >> ulong tmp; >> - ulong mmio = ZYNQMP_SATA_BASEADDR; >> int i; >> >> /* >> @@ -111,3 +111,40 @@ int init_sata(int dev) >> } >> return 0; >> } >> + >> +static int sata_ceva_probe(struct udevice *dev) >> +{ >> + struct scsi_platdata *plat = dev_get_platdata(dev); >> + >> + ceva_init_sata(plat->base); >> + return 0; >> +} >> + >> +static const struct udevice_id sata_ceva_ids[] = { >> + { .compatible = "ceva,ahci-1v84" }, >> + { } >> +}; >> + >> +static int sata_ceva_ofdata_to_platdata(struct udevice *dev) >> +{ >> + struct scsi_platdata *plat = dev_get_platdata(dev); >> + >> + plat->base = dev_get_addr(dev); >> + if (plat->base == FDT_ADDR_T_NONE) >> + return -EINVAL; >> + >> + /* Hardcode number for ceva sata controller */ >> + plat->max_lun = 1; /* Actually two but untested */ >> + plat->max_id = 2; >> + >> + return 0; >> +} >> + >> +U_BOOT_DRIVER(ceva_host_blk) = { >> + .name = "ceva_sata", >> + .id = UCLASS_SCSI, >> + .of_match = sata_ceva_ids, >> + .probe = sata_ceva_probe, >> + .ofdata_to_platdata = sata_ceva_ofdata_to_platdata, >> + .platdata_auto_alloc_size = sizeof(struct scsi_platdata), >> +}; >> diff --git a/include/configs/xilinx_zynqmp.h >> b/include/configs/xilinx_zynqmp.h >> index 7452e92ff8da..673c864ebc6f 100644 >> --- a/include/configs/xilinx_zynqmp.h >> +++ b/include/configs/xilinx_zynqmp.h >> @@ -182,15 +182,16 @@ >> # define CONFIG_SYS_EEPROM_SIZE (64 * 1024) >> #endif >> >> -#ifdef CONFIG_SATA_CEVA >> +#if defined(CONFIG_SATA_CEVA) && !defined(CONFIG_SPL_BUILD) >> #define CONFIG_LIBATA >> #define CONFIG_SCSI_AHCI >> -#define CONFIG_SCSI_AHCI_PLAT >> #define CONFIG_SYS_SCSI_MAX_SCSI_ID 2 >> #define CONFIG_SYS_SCSI_MAX_LUN 1 >> #define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \ >> CONFIG_SYS_SCSI_MAX_LUN) >> #define CONFIG_SCSI >> +#else >> +#undef CONFIG_SATA_CEVA > > Are you trying to undefine it for SPL? I suspect DM_SCSI already does > this, but you should do this in the Makefile (ifndef CONFIG_SPL_BUILD) > or perhaps create CONFIG_SPL_SATA_CEVA if you might want to add it to > SPL. > > We should not #undef Kconfig options. you are right - this is not needed now. > >> #endif >> >> #define CONFIG_SYS_BOOTM_LEN (60 * 1024 * 1024) >> diff --git a/include/configs/xilinx_zynqmp_ep.h >> b/include/configs/xilinx_zynqmp_ep.h >> index d0ce768e6e14..3a572b7a6c2f 100644 >> --- a/include/configs/xilinx_zynqmp_ep.h >> +++ b/include/configs/xilinx_zynqmp_ep.h >> @@ -16,7 +16,6 @@ >> #define CONFIG_ZYNQ_SDHCI_MAX_FREQ 52000000 >> #define CONFIG_ZYNQ_SDHCI_MIN_FREQ (CONFIG_ZYNQ_SDHCI_MAX_FREQ >> 9) >> #define CONFIG_ZYNQ_EEPROM >> -#define CONFIG_SATA_CEVA >> #define CONFIG_ZYNQMP_XHCI_LIST {ZYNQMP_USB0_XHCI_BASEADDR, \ >> ZYNQMP_USB1_XHCI_BASEADDR} >> >> diff --git a/include/configs/xilinx_zynqmp_zcu102.h >> b/include/configs/xilinx_zynqmp_zcu102.h >> index adf2321c5d4f..8d018da23e34 100644 >> --- a/include/configs/xilinx_zynqmp_zcu102.h >> +++ b/include/configs/xilinx_zynqmp_zcu102.h >> @@ -41,8 +41,6 @@ >> #define CONFIG_CMD_PCA953X >> #define CONFIG_CMD_PCA953X_INFO >> >> -#define CONFIG_SATA_CEVA >> - >> #define CONFIG_ZYNQMP_XHCI_LIST {ZYNQMP_USB0_XHCI_BASEADDR} >> >> #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 >> -- >> 1.9.1 >> > Thanks, Michal _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot