On 12/06/2016 08:52 AM, Chee Tien Fong wrote:
> From: Tien Fong Chee <tien.fong.c...@intel.com>
> 
> These changes to ensure Arria10 SPL build success.

Please reword the commit message, mention you're removing the Arria10
bits. Still, this does not even apply on mainline, on top of what does
this apply ?

> Signed-off-by: Tien Fong Chee <tien.fong.c...@intel.com>
> Cc: Marek Vasut <ma...@denx.de>
> Cc: Dinh Nguyen <dingu...@kernel.org>
> Cc: Chin Liang See <chin.liang....@intel.com>
> Cc: Tien Fong <skywind...@gmail.com>
> ---
>  arch/arm/Kconfig |    8 ++++----
>  1 files changed, 4 insertions(+), 4 deletions(-)
> 
> diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
> index 220bb19..05ce8b8 100644
> --- a/arch/arm/Kconfig
> +++ b/arch/arm/Kconfig
> @@ -622,12 +622,12 @@ config ARCH_SNAPDRAGON
>  config ARCH_SOCFPGA
>       bool "Altera SOCFPGA family"
>       select CPU_V7
> -     select SUPPORT_SPL if !TARGET_SOCFPGA_ARRIA10
> +     select SUPPORT_SPL
>       select OF_CONTROL
> -     select SPL_OF_CONTROL if !TARGET_SOCFPGA_ARRIA10
> +     select SPL_OF_CONTROL
>       select DM
> -     select DM_SPI_FLASH
> -     select DM_SPI
> +     select DM_SPI_FLASH if !TARGET_SOCFPGA_ARRIA10
> +     select DM_SPI if !TARGET_SOCFPGA_ARRIA10
>  
>  config TARGET_CM_T43
>       bool "Support cm_t43"
> 


-- 
Best regards,
Marek Vasut
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