On 12/13/2016 01:45 AM, Zhiqiang Hou wrote: > From: Hou Zhiqiang <zhiqiang....@nxp.com> > > Clear the content to zero and the ECC error bit of OCRAM1/2. > > The OCRAM must be initialized to ZERO by the unit of 8-Byte before > accessing it, or else it will generate ECC error. And the IBR has > accessed the OCRAM before this initialization, so the ECC error > status bit should to be cleared. > > Signed-off-by: Hou Zhiqiang <zhiqiang....@nxp.com> > Signed-off-by: Pratiyush Srivastava <pratiyush.srivast...@nxp.com> > Signed-off-by: Prabhakar Kushwaha <prabhakar.kushw...@nxp.com> > --- > arch/arm/cpu/armv8/fsl-layerscape/lowlevel.S | 37 > +++++++++++++++++++++++ > arch/arm/include/asm/arch-fsl-layerscape/config.h | 3 ++ > 2 files changed, 40 insertions(+) >
Zhiqiang, This looks like an updated version of previous patch "armv8/ls1043a: Add the OCRAM initialization". Was there any effort to include LSCH3? York _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot