On 12/22/2016 10:06 AM, Peng Fan wrote:
> Implement ofdata_to_platdata to set the type to host or device.
> - Check "dr-mode" property.
> - If there is no "dr-mode", check phy_ctrl for i.MX6
> and phy_status for i.MX7
>
> Signed-off-by: Peng Fan <peng....@nxp.com>
> Cc: Marek Vasut <ma...@denx.de>
> Cc: Simon Glass <s...@chromium.org>
> Cc: Stefano Babic <sba...@denx.de>
> ---
>
> V2:
> Add a ehci_usb_phy_mode function to check phy mode when dr-mode is otg,
> or no mode property provided.
>
> drivers/usb/host/ehci-mx6.c | 75
> +++++++++++++++++++++++++++++++++++++++++++++
> 1 file changed, 75 insertions(+)
>
> diff --git a/drivers/usb/host/ehci-mx6.c b/drivers/usb/host/ehci-mx6.c
> index 48889c1..18b7fc3 100644
> --- a/drivers/usb/host/ehci-mx6.c
> +++ b/drivers/usb/host/ehci-mx6.c
> @@ -15,10 +15,13 @@
> #include <asm/arch/imx-regs.h>
> #include <asm/arch/clock.h>
> #include <asm/imx-common/iomux-v3.h>
> +#include <asm/imx-common/sys_proto.h>
> #include <dm.h>
>
> #include "ehci.h"
>
> +DECLARE_GLOBAL_DATA_PTR;
> +
> #define USB_OTGREGS_OFFSET 0x000
> #define USB_H1REGS_OFFSET 0x200
> #define USB_H2REGS_OFFSET 0x400
> @@ -48,6 +51,7 @@
> #define ANADIG_USB2_PLL_480_CTRL_EN_USB_CLKS 0x00000040
>
> #define USBNC_OFFSET 0x200
> +#define USBNC_PHY_STATUS_OFFSET 0x23C
> #define USBNC_PHYSTATUS_ID_DIG (1 << 4) /* otg_id status */
> #define USBNC_PHYCFG2_ACAENB (1 << 4) /* otg_id detection enable */
> #define UCTRL_PWR_POL (1 << 9) /* OTG Polarity of Power Pin */
> @@ -417,6 +421,76 @@ static const struct ehci_ops mx6_ehci_ops = {
> .init_after_reset = mx6_init_after_reset
> };
>
> +static int ehci_usb_phy_mode(struct udevice *dev)
> +{
> + struct usb_platdata *plat = dev_get_platdata(dev);
> + void *__iomem addr = (void *__iomem)dev_get_addr(dev);
> + void *__iomem phy_ctrl, *__iomem phy_status;
> + const void *blob = gd->fdt_blob;
> + int offset = dev->of_offset, phy_off;
> + u32 val;
> +
> + /*
> + * About fsl,usbphy, Refer to
> + * Documentation/devicetree/bindings/usb/ci-hdrc-usb2.txt.
> + */
> + if (is_mx6()) {
> + phy_off = fdtdec_lookup_phandle(blob,
> + offset,
> + "fsl,usbphy");
This could be on a single line IMO.
> + if (phy_off < 0)
> + return -EINVAL;
> +
> + addr = (void __iomem *)fdtdec_get_addr(blob, phy_off,
> + "reg");
Same here, shouldn't be over 80.
Otherwise:
Acked-by: Marek Vasut <ma...@denx.de>
> + if ((fdt_addr_t)addr == FDT_ADDR_T_NONE)
> + return -EINVAL;
> +
> + phy_ctrl = (void __iomem *)(addr + USBPHY_CTRL);
> + val = readl(phy_ctrl);
> +
> + if (val & USBPHY_CTRL_OTG_ID)
> + plat->init_type = USB_INIT_DEVICE;
> + else
> + plat->init_type = USB_INIT_HOST;
> + } else if (is_mx7()) {
> + phy_status = (void __iomem *)(addr +
> + USBNC_PHY_STATUS_OFFSET);
> + val = readl(phy_status);
> +
> + if (val & USBNC_PHYSTATUS_ID_DIG)
> + plat->init_type = USB_INIT_DEVICE;
> + else
> + plat->init_type = USB_INIT_HOST;
> + } else {
> + return -EINVAL;
> + }
> +
> + return 0;
> +}
> +
> +static int ehci_usb_ofdata_to_platdata(struct udevice *dev)
> +{
> + struct usb_platdata *plat = dev_get_platdata(dev);
> + const char *mode;
> +
> + mode = fdt_getprop(gd->fdt_blob, dev->of_offset, "dr_mode", NULL);
> + if (mode) {
> + if (strcmp(mode, "peripheral") == 0)
> + plat->init_type = USB_INIT_DEVICE;
> + else if (strcmp(mode, "host") == 0)
> + plat->init_type = USB_INIT_HOST;
> + else if (strcmp(mode, "otg") == 0)
> + return ehci_usb_phy_mode(dev);
> + else
> + return -EINVAL;
> +
> + return 0;
> + }
> +
> + return ehci_usb_phy_mode(dev);
> +}
> +
> static int ehci_usb_probe(struct udevice *dev)
> {
> struct usb_platdata *plat = dev_get_platdata(dev);
> @@ -460,6 +534,7 @@ U_BOOT_DRIVER(usb_mx6) = {
> .name = "ehci_mx6",
> .id = UCLASS_USB,
> .of_match = mx6_usb_ids,
> + .ofdata_to_platdata = ehci_usb_ofdata_to_platdata,
> .probe = ehci_usb_probe,
> .remove = ehci_deregister,
> .ops = &ehci_usb_ops,
>
--
Best regards,
Marek Vasut
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