On 4.1.2017 13:27, stefan.herbrechtsme...@weidmueller.com wrote: > From: Stefan Herbrechtsmeier <stefan.herbrechtsme...@weidmueller.com> > > If available use the clock framework to calculate the clock rate of the > zynq timer. > > Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsme...@weidmueller.com> > --- > > arch/arm/mach-zynq/timer.c | 25 +++++++++++++++++++++++++ > 1 file changed, 25 insertions(+) > > diff --git a/arch/arm/mach-zynq/timer.c b/arch/arm/mach-zynq/timer.c > index 8ff82dc..0335cbe 100644 > --- a/arch/arm/mach-zynq/timer.c > +++ b/arch/arm/mach-zynq/timer.c > @@ -1,4 +1,7 @@ > /* > + * Copyright (C) 2017 Weidmüller Interface GmbH & Co. KG > + * Stefan Herbrechtsmeier <stefan.herbrechtsme...@weidmueller.com> > + * > * Copyright (C) 2012 Michal Simek <mon...@monstr.eu> > * Copyright (C) 2011-2012 Xilinx, Inc. All rights reserved. > * > @@ -25,8 +28,10 @@ > * SPDX-License-Identifier: GPL-2.0+ > */ > > +#include <clk.h> > #include <common.h> > #include <div64.h> > +#include <dm.h> > #include <asm/io.h> > #include <asm/arch/hardware.h> > #include <asm/arch/clk.h> > @@ -56,6 +61,26 @@ int timer_init(void) > (TIMER_PRESCALE << SCUTIMER_CONTROL_PRESCALER_SHIFT) | > SCUTIMER_CONTROL_ENABLE_MASK; > > +#if defined(CONFIG_CLK) || defined(CONFIG_SPL_CLK) > + struct udevice *dev; > + struct clk clk; > + int ret; > + > + ret = uclass_get_device_by_driver(UCLASS_CLK, > + DM_GET_DRIVER(zynq_clk), &dev); > + if (ret) > + return ret; > + > + clk.id = cpu_6or4x_clk;
This information is already present in DT file. What's the reason not to take it from it? > + ret = clk_request(dev, &clk); > + if (ret < 0) > + return ret; > + > + gd->cpu_clk = clk_get_rate(&clk); > + > + clk_free(&clk); Not clk expert but isn't there a way to handle it like it is handled for other drivers? clk_get(), clk_get_rate()? > +#endif > + > gd->arch.timer_rate_hz = (gd->cpu_clk / 2) / (TIMER_PRESCALE + 1); > > /* Load the timer counter register */ > Thanks, Michal -- Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91 w: www.monstr.eu p: +42-0-721842854 Maintainer of Linux kernel - Xilinx Microblaze Maintainer of Linux kernel - Xilinx Zynq ARM and ZynqMP ARM64 SoCs U-Boot custodian - Xilinx Microblaze/Zynq/ZynqMP SoCs
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