On Fri, Jan 13, 2017 at 01:29:59AM +0000, Andre Przywara wrote: > The DRAM controller in the Allwinner H5 SoC is again very similar to > the one in the H3 and A64. > Based on the existing socid parameter, add support for this controller > by reusing the bulk of the code and only deviating where needed. > Also add the delay line parameters taken from the boot0 and libdram > disassembly. > Register setup differences between H5 and H3 are courtesy of Jens Kuske. > > Signed-off-by: Andre Przywara <andre.przyw...@arm.com>
There's a number of issues with checkpatch here, please fix them. And there's way too many magics here, again... Maxime -- Maxime Ripard, Free Electrons Embedded Linux and Kernel engineering http://free-electrons.com
signature.asc
Description: PGP signature
_______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
