On 01/19/2017 04:39 PM, Stefan Roese wrote:
> This patch completely clears the SDHCI_CLOCK_CONTROL register before the
> new value is configured instead of just clearing the 2 bits
> SDHCI_CLOCK_CARD_EN and SDHCI_CLOCK_INT_EN. Without this change, some
> clock configurations will lead to the "Internal clock never stabilised."
> error message on the Xenon SDHCI controller used on the Marvell Armada
> 3700 and 7k/8k ARM64 SoCs.
>
> The Linux SDHCI core driver also writes 0 to this register before
> the new value is configured. So this patch simplifies the driver a bit
> and brings the U-Boot driver more in-line with the Linux one.
>
> Signed-off-by: Stefan Roese <s...@denx.de>
> Cc: Jaehoon Chung <jh80.ch...@samsung.com>
> Cc: Siva Durga Prasad Paladugu <siva...@xilinx.com>
> Cc: Michal Simek <michal.si...@xilinx.com>
Reviewed-by: Jaehoon Chung <jh80.ch...@samsung.com>
> ---
> drivers/mmc/sdhci.c | 6 ++----
> 1 file changed, 2 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/mmc/sdhci.c b/drivers/mmc/sdhci.c
> index 5b404ff4a3..081b014a17 100644
> --- a/drivers/mmc/sdhci.c
> +++ b/drivers/mmc/sdhci.c
> @@ -295,7 +295,7 @@ static int sdhci_send_command(struct mmc *mmc, struct
> mmc_cmd *cmd,
> static int sdhci_set_clock(struct mmc *mmc, unsigned int clock)
> {
> struct sdhci_host *host = mmc->priv;
> - unsigned int div, clk = 0, timeout, reg;
> + unsigned int div, clk = 0, timeout;
>
> /* Wait max 20 ms */
> timeout = 200;
> @@ -311,9 +311,7 @@ static int sdhci_set_clock(struct mmc *mmc, unsigned int
> clock)
> udelay(100);
> }
>
> - reg = sdhci_readw(host, SDHCI_CLOCK_CONTROL);
> - reg &= ~(SDHCI_CLOCK_CARD_EN | SDHCI_CLOCK_INT_EN);
> - sdhci_writew(host, reg, SDHCI_CLOCK_CONTROL);
> + sdhci_writew(host, 0, SDHCI_CLOCK_CONTROL);
>
> if (clock == 0)
> return 0;
>
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