On Mon, Oct 19, 2009 at 09:35:54AM +0200, Wolfgang Denk wrote:
> 
> 
> Did you try setting the "pciscandelay" variable? Try setting it to 5
> (or 10) [seconds]. See also
> 
<snip>

Thanks Wolfgang,

Per your suggestion, we tried setting the delay (and observed a delay),
but the outcome did not change.  The BIST still got set to fail and 
caused the board to become unresponsive, and thus Linux fails the detection
later.  FWIW, we've tried both with and without switches in between with no
change in the behavior.  We observe the transactions on a lecroy pcie 
analyzer.

I suppose one question that lingers in my mind is why does u-boot do 
anything other than just configure the IO/MEM bars?  Is there some specific
reason it is touching the BIST controls?  If I could understand the reason
for this, I might be able to do some debug and at least determine whether
I need to change u-boot, Linux, or both.

Thanks so much,
Ayman


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