On 10.03.2017 15:40, Stefan Roese wrote:
Define a board-specific detection pulse-width array for the SerDes PCIe
interfaces. If not defined in the board code, the default of currently 2
is used. Values from 0...3 are possible (2 bits).
In this case of the theadorable board, PEX interface 0 needs a value
of 0 for the detection pulse width so that the PCIe device (Atheros
WLAN PCIe device) is consistantly detected.
Signed-off-by: Stefan Roese <s...@denx.de>
Cc: Adam Shobash <ad...@marvell.com>
Cc: Nadav Haklai <nad...@marvell.com>
Cc: Konstantin Porotchkin <kos...@marvell.com>
Applied to u-boot-marvell/master.
Thanks,
Stefan
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