On Sel, 2017-03-28 at 11:38 +0200, Marek Vasut wrote:
> On 03/28/2017 11:25 AM, tien.fong.c...@intel.com wrote:
> > 
> > From: "Chee, Tien Fong" <tien.fong.c...@intel.com>
> > 
> > Fixing the broken implementation caused by the patch
> > commit:ce62e57fc57177352a02b76dace0173bd13404b6, ARM: boot0 hook:
> See section 2) here [1] , in particular the part about referencing
> commits and the Fixes: tag .
> 
> [1] https://www.kernel.org/doc/html/latest/process/submitting-patches
> .html
> 
> > 
> > remove macro, include whole header file. This patch also enhances
> > boot header to contain more special data.
> This should be a separate patch then.
> 
okay. Thanks.
> > 
> > Signed-off-by: Chee, Tien Fong <tien.fong.c...@intel.com>
> > ---
> >  arch/arm/mach-socfpga/include/mach/boot0.h | 30 ++++++++++++++++
> > --------------
> >  1 file changed, 16 insertions(+), 14 deletions(-)
> > 
> > diff --git a/arch/arm/mach-socfpga/include/mach/boot0.h
> > b/arch/arm/mach-socfpga/include/mach/boot0.h
> > index aaada31..877866a 100644
> > --- a/arch/arm/mach-socfpga/include/mach/boot0.h
> > +++ b/arch/arm/mach-socfpga/include/mach/boot0.h
> > @@ -8,21 +8,23 @@
> >  #define __BOOT0_H
> >  
> >  #ifdef CONFIG_SPL_BUILD
> > -#define ARM_SOC_BOOT0_HOOK                                         
> > \
> > -   .balignl 64,0xf33db33f;                                 
> >     \
> > -                                                                   
> > \
> > -   .word   0x1337c0d3;     /* SoCFPGA preloader
> > validation word */  \
> > -   .word   0xc01df00d;     /* Version, flags, length
> > */          \
> > -   .word   0xcafec0d3;     /* Checksum, zero-pad */        
> >     \
> > -   nop;                                                    
> >     \
> > -                                                                   
> > \
> > -   b reset;                /* SoCFPGA jumps here */                
> > \
> > -   nop;                                                    
> >     \
> > -   nop;                                                    
> >     \
> > -   nop;
> > -#else
> > -#define ARM_SOC_BOOT0_HOOK
> > +   .balignl 64,0xf33db33f;
> > +
> > +   /* Start of header offset */
> > +   .word   0x1337c0d3; /* SoCFPGA preloader validation
> > word(4B) */
> > +   .word   0xc01df00d; /* Header
> > length(2B),flags(1B),version(1B) */
> > +#ifndef CONFIG_TARGET_SOCFPGA_GEN5
> > +   .word   0xcafec0d3; /* Program length(4B) */
> > +   .word   0xf00dcafe; /* Program entry
> > offset(4B),relative to  */
> > +                       /* the start of program header */
> >  #endif
> > +   .word   0xfeedface; /* Simple checksum(2B),spare
> > offset(2B) */
> > +   nop;
> >  
> > +   b reset;            /* SoCFPGA jumps here */
> > +   nop;
> > +   nop;
> > +   nop;
> > +#endif
> >  
> >  #endif /* __BOOT0_H */
> > 
> 
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