On 25 March 2017 at 21:47, Simon Glass <s...@chromium.org> wrote:
> On 23 March 2017 at 21:39, Kever Yang <kever.y...@rock-chips.com> wrote:
>> Hi Philipp,
>>
>> On 03/24/2017 06:27 AM, Philipp Tomsich wrote:
>>>
>>> The BootROM of the RK3399 SoC does not initialise the cntfrq_el0 (which
>>> holds the value 0 (zero) on entry into the SPL. This causes the timebase
>>> for U-Boot not to advance (and will cause a hang where a timeout would
>>> be expected... e.g. if something goes wrong during MMC/SD card startup).
>>>
>>> This change defines COUNTER_FREQUENCY, which is used by the AArch64 init
>>> code in arch/arm/cpu/armv8/start.S to set up cntfrq_el0 (if necessary).
>>>
>>> Signed-off-by: Philipp Tomsich <philipp.toms...@theobroma-systems.com>
>>> ---
>>>
>>>   include/configs/rk3399_common.h | 2 ++
>>>   1 file changed, 2 insertions(+)
>>>
>>> diff --git a/include/configs/rk3399_common.h
>>> b/include/configs/rk3399_common.h
>>> index aeee805..c44f8ad 100644
>>> --- a/include/configs/rk3399_common.h
>>> +++ b/include/configs/rk3399_common.h
>>> @@ -19,6 +19,8 @@
>>>   #define CONFIG_SPL_DRIVERS_MISC_SUPPORT
>>>   #define CONFIG_SPL_SERIAL_SUPPORT
>>>   +#define COUNTER_FREQUENCY               24000000
>>> +
>>>   #define CONFIG_SYS_NS16550_MEM32
>>>     #define CONFIG_SYS_TEXT_BASE                0x00200000
>>
>>
>> Reveiwed-by: Kever Yang <kever.y...@rock-chips.com>
>
> Acked-by: Simon Glass <s...@chromium.org>

Applied to u-boot-rockchip, thanks!
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