Not every SoC needs to set up the GIC interrupt controller, so link
think code only when the respective config option is set.
This shaves off some bytes from the SPL code size.

Signed-off-by: Andre Przywara <andre.przyw...@arm.com>
Reviewed-by: Simon Glass <s...@chromium.org>
---
 arch/arm/lib/Makefile | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/arm/lib/Makefile b/arch/arm/lib/Makefile
index 6e96cfb..4efa37b 100644
--- a/arch/arm/lib/Makefile
+++ b/arch/arm/lib/Makefile
@@ -44,7 +44,9 @@ ifdef CONFIG_CPU_V7M
 obj-y  += interrupts_m.o
 else ifdef CONFIG_ARM64
 obj-y  += ccn504.o
+ifneq ($(CONFIG_GICV2)$(CONFIG_GICV3),)
 obj-y  += gic_64.o
+endif
 obj-y  += interrupts_64.o
 else
 obj-y  += interrupts.o
-- 
2.8.2

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