From: Paul Burton <paul.bur...@imgtec.com>
Using the EG20T gigabit ethernet controller on the MIPS Boston board, we
find that we have to reset the controller in order for the RGMII link to
the PHY to become functional. Without doing so we constantly time out in
pch_gbe_mdio_ready.
Signed-off-by: Paul Burton <paul.bur...@imgtec.com>
Reviewed-by: Bin Meng <bmeng...@gmail.com>
Tested-by: Bin Meng <bmeng...@gmail.com>
Signed-off-by: Daniel Schwierzeck <daniel.schwierz...@gmail.com>
---
Changes in v2: None
drivers/net/pch_gbe.c | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/drivers/net/pch_gbe.c b/drivers/net/pch_gbe.c
index d40fff0e48..4aac0f67a0 100644
--- a/drivers/net/pch_gbe.c
+++ b/drivers/net/pch_gbe.c
@@ -422,6 +422,7 @@ int pch_gbe_probe(struct udevice *dev)
struct pch_gbe_priv *priv;
struct eth_pdata *plat = dev_get_platdata(dev);
void *iobase;
+ int err;
/*
* The priv structure contains the descriptors and frame buffers which
@@ -444,6 +445,10 @@ int pch_gbe_probe(struct udevice *dev)
pch_gbe_mdio_init(dev->name, priv->mac_regs);
priv->bus = miiphy_get_dev_by_name(dev->name);
+ err = pch_gbe_reset(dev);
+ if (err)
+ return err;
+
return pch_gbe_phy_init(dev);
}
--
2.11.0
_______________________________________________
U-Boot mailing list
U-Boot@lists.denx.de
https://lists.denx.de/listinfo/u-boot
