On 04/27/2017 10:11 PM, Priyanka Jain wrote:
> Update QIXIS related code to be executed
> only if CONFIG_FSL_QIXIS flag is enabled
>
> As per board documentation, default sysclk is 100MHz.
> In case QIXIS code is not enabled,
> update default sysclk value to 100MHz
>
> Signed-off-by: Priyanka Jain <priyanka.j...@nxp.com>
> ---
>  Changes for v4:
>       Added changes for default sysclk as 100MHz
>
>  board/freescale/ls2080ardb/ls2080ardb.c |   21 +++++++++++++++++----
>  1 files changed, 17 insertions(+), 4 deletions(-)

Reformatted commit message. Applied to fsl-qoriq master, awaiting upstream.

York

_______________________________________________
U-Boot mailing list
U-Boot@lists.denx.de
https://lists.denx.de/listinfo/u-boot

Reply via email to