On 06/21/2017 12:23 PM, Alan Ott wrote:
> Previously this driver appeared to have been half-way converted to the new
> driver model and did not work at all.
> 
> Complete the transition to the driver model, adding the necessary
> connections.
> 
> Signed-off-by: Alan Ott <a...@softiron.com>
> ---
>  configs/pic32mzdask_defconfig |  1 -
>  drivers/mmc/Kconfig           |  2 +-
>  drivers/mmc/pic32_sdhci.c     | 31 ++++++++++++++++++++++++++-----
>  3 files changed, 27 insertions(+), 7 deletions(-)
> 
> diff --git a/configs/pic32mzdask_defconfig b/configs/pic32mzdask_defconfig
> index 688b989..afb1bdb 100644
> --- a/configs/pic32mzdask_defconfig
> +++ b/configs/pic32mzdask_defconfig
> @@ -25,7 +25,6 @@ CONFIG_CMD_EXT4_WRITE=y
>  # CONFIG_EFI_PARTITION is not set
>  CONFIG_OF_EMBED=y
>  CONFIG_NET_RANDOM_ETHADDR=y
> -# CONFIG_BLK is not set
>  CONFIG_CLK=y
>  CONFIG_DM_GPIO=y
>  CONFIG_MMC=y
> diff --git a/drivers/mmc/Kconfig b/drivers/mmc/Kconfig
> index 0dd4443..b70775d 100644
> --- a/drivers/mmc/Kconfig
> +++ b/drivers/mmc/Kconfig
> @@ -274,7 +274,7 @@ config MMC_SDHCI_MV
>  
>  config MMC_SDHCI_PIC32
>       bool "Microchip PIC32 on-chip SDHCI support"
> -     depends on DM_MMC && MACH_PIC32
> +     depends on DM_MMC && BLK && DM_MMC_OPS && MACH_PIC32

If DM_MMC is enabled,,then CONFIG_BLK and CONFIG_DM_MMC_OPS are "y" by default.
Why do you touch this?

>       depends on MMC_SDHCI
>       help
>         Support for Microchip PIC32 SDHCI controller.
> diff --git a/drivers/mmc/pic32_sdhci.c b/drivers/mmc/pic32_sdhci.c
> index 212e22e..fc6d7f3 100644
> --- a/drivers/mmc/pic32_sdhci.c
> +++ b/drivers/mmc/pic32_sdhci.c
> @@ -15,6 +15,11 @@
>  
>  DECLARE_GLOBAL_DATA_PTR;
>  
> +struct pic32_sdhci_plat {
> +     struct mmc_config cfg;
> +     struct mmc mmc;
> +};
> +
>  static int pic32_sdhci_get_cd(struct sdhci_host *host)
>  {
>       /* PIC32 SDHCI CD errata:
> @@ -31,6 +36,8 @@ static const struct sdhci_ops pic32_sdhci_ops = {
>  
>  static int pic32_sdhci_probe(struct udevice *dev)
>  {
> +     struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev);
> +     struct pic32_sdhci_plat *plat = dev_get_platdata(dev);
>       struct sdhci_host *host = dev_get_priv(dev);
>       const void *fdt = gd->fdt_blob;
>       u32 f_min_max[2];
> @@ -56,14 +63,25 @@ static int pic32_sdhci_probe(struct udevice *dev)
>               return ret;
>       }
>  
> -     host->max_clk   = f_min_max[1];
> -
> -     ret = add_sdhci(host, 0, f_min_max[0]);
> -     if (ret)
> +     ret = sdhci_setup_cfg(&plat->cfg, host, /*max*/0, /*min*/f_min_max[0]);

What are "/*max*, /*min*/" ?

> +     if (ret) {
> +             printf("pic32_sdhci: sdhci_setup_cfg() failed\n");
>               return ret;
> +     }
> +
> +     host->mmc = &plat->mmc;
>       host->mmc->dev = dev;
> +     host->mmc->priv = host;
> +     upriv->mmc = host->mmc;
>  
> -     return 0;
> +     return sdhci_probe(dev);
> +}
> +
> +static int pic32_sdhci_bind(struct udevice *dev)
> +{
> +     struct pic32_sdhci_plat *plat = dev_get_platdata(dev);
> +
> +     return sdhci_bind(dev, &plat->mmc, &plat->cfg);
>  }
>  
>  static const struct udevice_id pic32_sdhci_ids[] = {
> @@ -75,6 +93,9 @@ U_BOOT_DRIVER(pic32_sdhci_drv) = {
>       .name                   = "pic32_sdhci",
>       .id                     = UCLASS_MMC,
>       .of_match               = pic32_sdhci_ids,
> +     .ops                    = &sdhci_ops,
> +     .bind                   = pic32_sdhci_bind,
>       .probe                  = pic32_sdhci_probe,
>       .priv_auto_alloc_size   = sizeof(struct sdhci_host),
> +     .platdata_auto_alloc_size = sizeof(struct pic32_sdhci_plat),
>  };
> 

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