This change sets the VLDO4 settings output to 2.8V in PMIC
initialization so that the MIPI DSI/CSI input voltage is 2.8V
as per the schematics. The original code provides an output of
3.3V which violates the voltage mentioned in the schematics.
Signed-off-by: Gautam Bhat <mindentr...@gmail.com>
---
Changes in v3:
- Used pmic_clrsetbits for consistency.
board/freescale/mx7dsabresd/mx7dsabresd.c | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/board/freescale/mx7dsabresd/mx7dsabresd.c
b/board/freescale/mx7dsabresd/mx7dsabresd.c
index ecea5a529a..7d22501d26 100644
--- a/board/freescale/mx7dsabresd/mx7dsabresd.c
+++ b/board/freescale/mx7dsabresd/mx7dsabresd.c
@@ -354,6 +354,12 @@ int power_init_board(void)
pmic_clrsetbits(dev, PFUZE3000_LDOGCTL, 0, 1);
+ /*
+ * Set the voltage of VLDO4 output to 2.8V which feeds
+ * the MIPI DSI and MIPI CSI inputs.
+ */
+ pmic_clrsetbits(dev, PFUZE3000_VLD4CTL, 0xF, 0xA);
+
return 0;
}
#endif
--
2.11.0
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