Hi Yangbo, On Wed, Aug 23, 2017 at 11:29 AM, Y.b. Lu <yangbo...@nxp.com> wrote: > cmd/mmc.c > > Maybe SD controller on some vendor platforms doesn't support SNOOP. > flush_cache() is required to sync between DDR and cache. > Should be careful to remove this. >
Please do not top-posting. What you mentioned if snoop is not supported, flush_cache() is required, is true, however that's not the issue I am trying to fix here. The flush_cache() here after a DMA read will cause issues because stale data in the cache will overwrite the correct data in the RAM that is DMAed by hardware (in this case, MMC controller). Regards, Bin _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
