On 04.09.2017 07:38, Chris Packham wrote:
From: Joshua Scott <joshua.sc...@alliedtelesis.co.nz>
Display more information about the current RAM configuration. With these
changes the output on a 88F6820 board is
SoC: MV88F6820-A0 at 1600 MHz
DRAM: 2 GiB (800 MHz, 32-bit, ECC not enabled)
Signed-off-by: Joshua Scott <joshua.sc...@alliedtelesis.co.nz>
Signed-off-by: Chris Packham <judge.pack...@gmail.com>
---
One of the hardware designers at $dayjob expressed a desire to keep
track of various tweaks to the DDR setup during hardware debugging
sessions. This is the result.
I've based this on what is available for the fsl platforms. It might be
nice to add a few more things but I'm concious of keeping the
information relevant and succinct.
Changes in v2:
- A375 and A38x have 16/32b DDR bus
Applied to u-boot-marvell/master.
Thanks,
Stefan
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