Hi Bo On 09/29/2017 08:12 AM, Bo Shen wrote: > Hi Patrice, > > On 09/27/2017 06:44 AM, patrice.chot...@st.com wrote: >> From: Patrice Chotard <patrice.chot...@st.com> >> >> Use BIT() macro and GENMASK() macro >> >> Signed-off-by: Patrice Chotard <patrice.chot...@st.com> >> Reviewed-by: Vikas Manocha <vikas.mano...@st.com> >> --- >> drivers/serial/serial_stm32x7.h | 18 +++++++++--------- >> 1 file changed, 9 insertions(+), 9 deletions(-) >> >> diff --git a/drivers/serial/serial_stm32x7.h >> b/drivers/serial/serial_stm32x7.h >> index 9fe37af..6d36b74 100644 >> --- a/drivers/serial/serial_stm32x7.h >> +++ b/drivers/serial/serial_stm32x7.h >> @@ -28,18 +28,18 @@ struct stm32x7_serial_platdata { >> unsigned long int clock_rate; >> }; >> -#define USART_CR1_OVER8 (1 << 15) >> -#define USART_CR1_TE (1 << 3) >> -#define USART_CR1_RE (1 << 2) >> -#define USART_CR1_UE (1 << 0) >> +#define USART_CR1_OVER8 BIT(15) >> +#define USART_CR1_TE BIT(3) >> +#define USART_CR1_RE BIT(2) >> +#define USART_CR1_UE BIT(0) >> -#define USART_CR3_OVRDIS (1 << 12) >> +#define USART_CR3_OVRDIS BIT(12) >> -#define USART_SR_FLAG_RXNE (1 << 5) >> -#define USART_SR_FLAG_TXE (1 << 7) >> +#define USART_SR_FLAG_RXNE BIT(5) >> +#define USART_SR_FLAG_TXE BIT(7) >> -#define USART_BRR_F_MASK 0xFF >> +#define USART_BRR_F_MASK GENMASK(7, 0) >> #define USART_BRR_M_SHIFT 4 >> -#define USART_BRR_M_MASK 0xFFF0 >> +#define USART_BRR_M_MASK GENMASK(15, 4) > > In stm32f7, according to the datasheet, there is no fraction and > mantissa. Would you please confirm that?
Agree, "mantissa" is a different wording for BRR[15:4] bits and "fraction" is used for BRR[0:3] bits > > At the same time, it makes me thinking the BRR is calculated differently > between stm32f7 and stm32f4, would you please check it also in the > driver code? Previously BRR was calculated with a more complex formula, i simply reused the same BRR formula from the kernel serial driver common to F4/F7/H7 (see drivers/tty/serial/stm32-usart.c) > >> #endif >> > > Best Regards, > Bo Shen Regards Patrice _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot