Am Mittwoch, 22. November 2017, 17:10:19 CET schrieb Joseph Chen: > > 在 2017/11/21 23:43, Andrew F. Davis 写道: > > On 11/20/2017 03:25 PM, Heiko Stübner wrote: > >> Hi Kever, > >> > >> Am Mittwoch, 6. September 2017, 10:14:27 CET schrieb Kever Yang: > >>> Add some generic options for TPL support for arm 32bit, and then > >>> and TPL support for rk3229(cortex-A7), and then add OPTEE support > >>> in SPL. > >> I was now finally able to test this series and I'm getting mixed results. > >> I was following the instructions in the evb-rk3229 README file. > >> > >> > >> On the uboot side it seems to work nicely when applied against 2017.09. > >> > >> But when I try to rebase it on top of the next branch of u-boot-rockchip > >> I end up with the TPL claiming a "Missing DTB", so it looks like it needs > >> a respin to follow the recent changes. > >> > >> On the optee-side I also seem to do something wrong or so. > >> When using the binaries from the rkbin github repository I end up with > >> [0] and [1]. > >> When compiling the most-recent optee it fails with [2]. > >> > >> With some intermediate optee or the one from Tony Xie's repository > >> it compiles and uboot seems to start, but then fails when the kernel tries > >> to bring up the secondary cpus [3]. And interestingly while it seems to go > >> through optee, I don't see any optee-messages. > >> > >> If you could point me into the right direction, I would be very grateful > >> :-) > >> > >> > >> Thanks > >> Heiko > >> > >> > >> [0] > >> TPL Inittimer init done > >> Returning to boot ROM... > >> > >> U-Boot SPL 2017.09-rc4-00031-gf82145695e-dirty (Nov 20 2017 - 19:24:42) > >> Trying to boot from MMC1 > >> INF TEE-CORE:init_primary_helper:319: Initializing (1.0.1-65-gf1567d3-dev > >> #22 Fri Mar 24 06:16:54 UTC 2017 arm) > >> INF TEE-CORE:init_primary_helper:320: Release version: 1.9 > >> INF TEE-CORE:init_teecore:79: teecore inits done > >> [hangs here] > >> > >> [1] > >> TPL Inittimer init done > >> Returning to boot ROM... > >> > >> U-Boot SPL 2017.09-rc4-00031-gf82145695e-dirty (Nov 20 2017 - 19:24:42) > >> Trying to boot from MMC1 > >> INF [0x0] TEE-CORE:init_primary_helper:366: Initializing > >> (1.1.0-120-gb4aded8-dev #3 Wed Dec 28 01:56:52 UTC 2016 arm) > >> INF [0x0] TEE-CORE:init_primary_helper:367: Release version: 1.6 > >> INF [0x0] TEE-CORE:init_teecore:83: teecore inits done > >> [hangs here] > >> > >> [2] > >> make CROSS_COMPILE_ta_arm32=arm-none-eabi- PLATFORM=rockchip-rk322x > >> CHK out/arm-plat-rockchip/conf.mk > >> UPD out/arm-plat-rockchip/conf.mk > >> CHK out/arm-plat-rockchip/include/generated/conf.h > >> UPD out/arm-plat-rockchip/include/generated/conf.h > >> CHK out/arm-plat-rockchip/core/include/generated/asm-defines.h > >> make: *** No rule, to create „core/include/tee/tee_cryp_provider.h“, > >> needed by > >> „out/arm-plat-rockchip/core/arch/arm/kernel/user_ta.o“. > >> > > make clean; git clean -fx..; then try again > > > >> [3] > >> TPL Inittimer init done > >> Returning to boot ROM... > >> > >> U-Boot SPL 2017.09-rc4-00031-gf82145695e-dirty (Nov 20 2017 - 19:24:42) > >> Trying to boot from MMC1 > >> > >> > >> U-Boot 2017.09-rc4-00031-gf82145695e-dirty (Nov 20 2017 - 21:29:43 +0100) > >> > >> Model: Nexbox A95X R1 > >> DRAM: 1022 MiB > >> [...] > >> Starting kernel ... > >> > >> [ 0.000000] Booting Linux on physical CPU 0xf00 > >> [ 0.000000] Linux version 4.14.0-13997-g55102e6ed32a-dirty > >> (hstuebner@phil) (gcc version 7.2.0 (Debian 7.2.0-11)) #437 SMP Mon Nov 20 > >> 11:33:35 CET 2017 > >> [ 0.000000] CPU: ARMv7 Processor [410fc075] revision 5 (ARMv7), > >> cr=10c5387d > >> [ 0.000000] CPU: div instructions available: patching division code > >> [ 0.000000] CPU: PIPT / VIPT nonaliasing data cache, VIPT aliasing > >> instruction cache > >> [ 0.000000] OF: fdt: Machine model: Nexbox A95X R1 > >> [ 0.000000] earlycon: uart8250 at MMIO32 0x11030000 (options '') > >> [ 0.000000] bootconsole [uart8250] enabled > >> [ 0.000000] Memory policy: Data cache writealloc > >> [ 0.000000] efi: Getting EFI parameters from FDT: > >> [ 0.000000] efi: UEFI not found. > >> [ 0.000000] cma: Reserved 64 MiB at 0x9c000000 > >> [ 0.000000] psci: probing for conduit method from DT. > >> [ 0.000000] psci: PSCIv1.0 detected in firmware. > >> [ 0.000000] psci: Using standard PSCI v0.2 function IDs > >> [ 0.000000] psci: MIGRATE_INFO_TYPE not supported. > >> [ 0.000000] random: fast init done > >> [ 0.000000] percpu: Embedded 17 pages/cpu @ef7a4000 s39116 r8192 d22324 > >> u69632 > >> [ 0.000000] Built 1 zonelists, mobility grouping on. Total pages: > >> 260096 > >> [...] > >> [ 0.000000] CPU0: thread -1, cpu 0, socket 15, mpidr 80000f00 > >> [ 0.000000] Setting up static identity map for 0x60300000 - 0x603000a0 > >> [ 0.000000] Hierarchical SRCU implementation. > >> [ 0.000000] EFI services will not be available. > >> [ 0.000000] smp: Bringing up secondary CPUs ... > >> [hangs here] > >> > > I've been here plenty of times when brining up OP-TEE on TI platforms, > > for me it's OP-TEE parking the secondary CPUs in a bad way. I'm not sure > > about the Rockchip arch, are the extra cores brought up with PSCI? > > Anyway can you get JTAG on this device, see where the other cores are stuck. > > > > If your OP-TEE is from Tony Xie's repository, I think the reason maybe > that cntfrq register is not been initialized. core0 stucks at udelay() > in the OP-TEE when it tries to bring up core1. So can you try to > initialize cntfrq as 24000000 in the SPL/TPL ? maybe it helps.
That might be a good lead, as yesterday evening I noticed similar issues with the architected timer when starting the linux kernel, which hangs at some point and only manages to continue once I disable the arch-timer in the devicetree. I tried Tony's repository directly and also the official op-tee where his patches got merged to. _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot