On Sat, Nov 25, 2017 at 2:06 AM, Jagan Teki <ja...@amarulasolutions.com> wrote: > On Sat, Nov 25, 2017 at 1:17 AM, Dr. Philipp Tomsich > <philipp.toms...@theobroma-systems.com> wrote: >> Jagan, Maxime & Tom, >> >> I have a couple of changes to spl_fit.c queued that we need to get merged to >> fix some issues for ATF support on Rockchip platforms. > > Does all rk64 has enough SPL size's to fit? > >> However, due to internal alignment before the ARMv8 vectors, this breaks the >> sun50i builds (all exceeding their SPL size by up to approx. 1KB), even >> though I am adding only about a 100 bytes to the size of spl_fit.c. > > Yes, as per as my trails[1] it's not possible to increase SPL size. > >> >> The change that triggers this is: >> https://patchwork.ozlabs.org/patch/813598/ >> >> However, the root cause lies in the “.align 11” in exceptions.c, which >> generates a ‘*fill*’ similar to this one (and we have been lucky enough that >> this came out as a rather small number up until me increasing the size of >> spl_fit.o): >> *fill* 0x0000000000011214 0x5ec >> .text.vectors 0x0000000000011800 0x838 >> arch/arm/cpu/armv8/built-in.o >> >> The quickest way to resolve would be to drop support for exception vectors >> on sun50i. > > Don't we miss the exceptions during SPL? > >> Any other suggestions are also welcome. > > I would rather think to implement TPL provided if there is no option > to increase the SPL size instead of missing exception vectors. > > [1] https://patchwork.ozlabs.org/patch/835973/
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