This series reverts use of bounce_buf.c for non-DMA related alignment
restriction and replaces it with local bounce buffer to handle problems
with non 32 bit aligned writes on TI platforms.
Based on top of Jason's series:
https://patchwork.ozlabs.org/cover/856431/
Tested on K2G EVM.
Goldschmidt Simon (1):
Revert "spi: cadence_qspi_apb: Use 32 bit indirect read transaction
when possible"
Vignesh R (2):
Revert "spi: cadence_qspi_apb: Use 32 bit indirect write transaction
when possible"
spi: cadence_qspi_apb: Make flash writes 32 bit aligned
drivers/spi/cadence_qspi_apb.c | 49 ++++++++++++++++++----------------------
include/configs/k2g_evm.h | 1 -
include/configs/socfpga_common.h | 1 -
include/configs/stv0991.h | 1 -
4 files changed, 22 insertions(+), 30 deletions(-)
--
2.15.1
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