On Mon, Jan 22, 2018 at 3:14 PM, Chris Packham <judge.pack...@gmail.com> wrote: > Erratum NO. FE-9144572: The device SPI interface supports frequencies of > up to 50 MHz. However, due to this erratum, when the device core clock > is 250 MHz and the SPI interfaces is configured for 50MHz SPI clock and > CPOL=CPHA=1 there might occur data corruption on reads from the SPI > device. > > Implement the workaround by setting the TMISO_SAMPLE value to 0x2 > in the timing1 register. > > Signed-off-by: Chris Packham <judge.pack...@gmail.com> > Reviewed-by: Stefan Roese <s...@denx.de> > Reviewed-by: Jagan Teki <ja...@openedev.com> > ---
Applied to u-boot-spi/master _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
