The rk3228 and rk3328 Socs both support integrated phy, implement
their power up function to support it.
Signed-off-by: David Wu <david...@rock-chips.com>
---
drivers/net/gmac_rockchip.c | 122 ++++++++++++++++++++++++++++++++++++++++++++
1 file changed, 122 insertions(+)
diff --git a/drivers/net/gmac_rockchip.c b/drivers/net/gmac_rockchip.c
index bca0a2a..ec47933 100644
--- a/drivers/net/gmac_rockchip.c
+++ b/drivers/net/gmac_rockchip.c
@@ -583,6 +583,126 @@ static void rv1108_gmac_set_to_rmii(struct
gmac_rockchip_platdata *pdata)
RV1108_GMAC_PHY_INTF_SEL_RMII);
}
+static void rk3228_gmac_integrated_phy_powerup(struct gmac_rockchip_platdata
*pdata)
+{
+ struct rk322x_grf *grf;
+ enum {
+ RK3228_GRF_CON_MUX_GMAC_INTEGRATED_PHY_MASK = BIT(15),
+ RK3228_GRF_CON_MUX_GMAC_INTEGRATED_PHY = BIT(15),
+ };
+ enum {
+ RK3228_MACPHY_CFG_CLK_50M_MASK = BIT(14),
+ RK3228_MACPHY_CFG_CLK_50M = BIT(14),
+
+ RK3228_MACPHY_RMII_MODE_MASK = GENMASK(7, 6),
+ RK3228_MACPHY_RMII_MODE = BIT(6),
+
+ RK3228_MACPHY_ENABLE_MASK = BIT(0),
+ RK3228_MACPHY_DISENABLE = 0,
+ RK3228_MACPHY_ENABLE = BIT(0),
+ };
+ enum {
+ RK3228_RK_GRF_CON2_MACPHY_ID_MASK = GENMASK(6, 0),
+ RK3228_RK_GRF_CON2_MACPHY_ID = 0x1234,
+ };
+ enum {
+ RK3228_RK_GRF_CON3_MACPHY_ID_MASK = GENMASK(5, 0),
+ RK3228_RK_GRF_CON3_MACPHY_ID = 0x35,
+ };
+
+ grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
+ rk_clrsetreg(&grf->con_iomux,
+ RK3228_GRF_CON_MUX_GMAC_INTEGRATED_PHY_MASK,
+ RK3228_GRF_CON_MUX_GMAC_INTEGRATED_PHY);
+
+ rk_clrsetreg(&grf->macphy_con[2],
+ RK3228_RK_GRF_CON2_MACPHY_ID_MASK,
+ RK3228_RK_GRF_CON2_MACPHY_ID);
+
+ rk_clrsetreg(&grf->macphy_con[3],
+ RK3228_RK_GRF_CON3_MACPHY_ID_MASK,
+ RK3228_RK_GRF_CON3_MACPHY_ID);
+
+ /* disabled before trying to reset it &*/
+ rk_clrsetreg(&grf->macphy_con[0],
+ RK3228_MACPHY_CFG_CLK_50M_MASK |
+ RK3228_MACPHY_RMII_MODE_MASK |
+ RK3228_MACPHY_ENABLE_MASK,
+ RK3228_MACPHY_CFG_CLK_50M |
+ RK3228_MACPHY_RMII_MODE |
+ RK3228_MACPHY_DISENABLE);
+
+ reset_assert(&pdata->phy_reset);
+ udelay(10);
+ reset_deassert(&pdata->phy_reset);
+ udelay(10);
+
+ rk_clrsetreg(&grf->macphy_con[0],
+ RK3228_MACPHY_ENABLE_MASK,
+ RK3228_MACPHY_ENABLE);
+ udelay(30 * 1000);
+}
+
+static void rk3328_gmac_integrated_phy_powerup(struct gmac_rockchip_platdata
*pdata)
+{
+ struct rk3328_grf_regs *grf;
+ enum {
+ RK3328_GRF_CON_RMII_MODE_MASK = BIT(9),
+ RK3328_GRF_CON_RMII_MODE = BIT(9),
+ };
+ enum {
+ RK3328_MACPHY_CFG_CLK_50M_MASK = BIT(14),
+ RK3328_MACPHY_CFG_CLK_50M = BIT(14),
+
+ RK3328_MACPHY_RMII_MODE_MASK = GENMASK(7, 6),
+ RK3328_MACPHY_RMII_MODE = BIT(6),
+
+ RK3328_MACPHY_ENABLE_MASK = BIT(0),
+ RK3328_MACPHY_DISENABLE = 0,
+ RK3328_MACPHY_ENABLE = BIT(0),
+ };
+ enum {
+ RK3328_RK_GRF_CON2_MACPHY_ID_MASK = GENMASK(6, 0),
+ RK3328_RK_GRF_CON2_MACPHY_ID = 0x1234,
+ };
+ enum {
+ RK3328_RK_GRF_CON3_MACPHY_ID_MASK = GENMASK(5, 0),
+ RK3328_RK_GRF_CON3_MACPHY_ID = 0x35,
+ };
+
+ grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
+ rk_clrsetreg(&grf->macphy_con[1],
+ RK3328_GRF_CON_RMII_MODE_MASK,
+ RK3328_GRF_CON_RMII_MODE);
+
+ rk_clrsetreg(&grf->macphy_con[2],
+ RK3328_RK_GRF_CON2_MACPHY_ID_MASK,
+ RK3328_RK_GRF_CON2_MACPHY_ID);
+
+ rk_clrsetreg(&grf->macphy_con[3],
+ RK3328_RK_GRF_CON3_MACPHY_ID_MASK,
+ RK3328_RK_GRF_CON3_MACPHY_ID);
+
+ /* disabled before trying to reset it &*/
+ rk_clrsetreg(&grf->macphy_con[0],
+ RK3328_MACPHY_CFG_CLK_50M_MASK |
+ RK3328_MACPHY_RMII_MODE_MASK |
+ RK3328_MACPHY_ENABLE_MASK,
+ RK3328_MACPHY_CFG_CLK_50M |
+ RK3328_MACPHY_RMII_MODE |
+ RK3328_MACPHY_DISENABLE);
+
+ reset_assert(&pdata->phy_reset);
+ udelay(10);
+ reset_deassert(&pdata->phy_reset);
+ udelay(10);
+
+ rk_clrsetreg(&grf->macphy_con[0],
+ RK3328_MACPHY_ENABLE_MASK,
+ RK3328_MACPHY_ENABLE);
+ udelay(30 * 1000);
+}
+
static int gmac_rockchip_probe(struct udevice *dev)
{
struct gmac_rockchip_platdata *pdata = dev_get_platdata(dev);
@@ -695,6 +815,7 @@ const struct rk_gmac_ops rk3228_gmac_ops = {
.fix_rgmii_speed = rk3228_gmac_fix_rgmii_speed,
.set_to_rmii = rk3228_gmac_set_to_rmii,
.set_to_rgmii = rk3228_gmac_set_to_rgmii,
+ .integrated_phy_powerup = rk3228_gmac_integrated_phy_powerup,
};
const struct rk_gmac_ops rk3288_gmac_ops = {
@@ -707,6 +828,7 @@ const struct rk_gmac_ops rk3328_gmac_ops = {
.fix_rgmii_speed = rk3328_gmac_fix_rgmii_speed,
.set_to_rmii = rk3328_gmac_set_to_rmii,
.set_to_rgmii = rk3328_gmac_set_to_rgmii,
+ .integrated_phy_powerup = rk3328_gmac_integrated_phy_powerup,
};
const struct rk_gmac_ops rk3368_gmac_ops = {
--
2.7.4
_______________________________________________
U-Boot mailing list
U-Boot@lists.denx.de
https://lists.denx.de/listinfo/u-boot
