> Implement the setting parent and rate for gmac2phy clock, and > add internal pll div set for gmac2phy clk. > > Signed-off-by: David Wu <david...@rock-chips.com> > --- > > drivers/clk/rockchip/clk_rk3328.c | 86 > +++++++++++++++++++++++++++++++++++++++ > 1 file changed, 86 insertions(+) >
Acked-by: Philipp Tomsich <philipp.toms...@theobroma-systems.com> _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
