The configure_l2ctlr() is used only by rk3288, do not need to
locate in sys_proto.h

Signed-off-by: Kever Yang <kever.y...@rock-chips.com>
---

 arch/arm/include/asm/arch-rockchip/sys_proto.h | 22 ----------------------
 arch/arm/mach-rockchip/rk3288/rk3288.c         | 26 +++++++++++++++++++++++++-
 2 files changed, 25 insertions(+), 23 deletions(-)

diff --git a/arch/arm/include/asm/arch-rockchip/sys_proto.h 
b/arch/arm/include/asm/arch-rockchip/sys_proto.h
index e428d59..3617ac2 100644
--- a/arch/arm/include/asm/arch-rockchip/sys_proto.h
+++ b/arch/arm/include/asm/arch-rockchip/sys_proto.h
@@ -7,27 +7,5 @@
 #ifndef _ASM_ARCH_SYS_PROTO_H
 #define _ASM_ARCH_SYS_PROTO_H
 
-#ifdef CONFIG_ROCKCHIP_RK3288
-#include <asm/armv7.h>
-
-static void configure_l2ctlr(void)
-{
-       uint32_t l2ctlr;
-
-       l2ctlr = read_l2ctlr();
-       l2ctlr &= 0xfffc0000; /* clear bit0~bit17 */
-
-       /*
-       * Data RAM write latency: 2 cycles
-       * Data RAM read latency: 2 cycles
-       * Data RAM setup latency: 1 cycle
-       * Tag RAM write latency: 1 cycle
-       * Tag RAM read latency: 1 cycle
-       * Tag RAM setup latency: 1 cycle
-       */
-       l2ctlr |= (1 << 3 | 1 << 0);
-       write_l2ctlr(l2ctlr);
-}
-#endif /* CONFIG_ROCKCHIP_RK3288 */
 
 #endif /* _ASM_ARCH_SYS_PROTO_H */
diff --git a/arch/arm/mach-rockchip/rk3288/rk3288.c 
b/arch/arm/mach-rockchip/rk3288/rk3288.c
index acc3b79..1e1c6be 100644
--- a/arch/arm/mach-rockchip/rk3288/rk3288.c
+++ b/arch/arm/mach-rockchip/rk3288/rk3288.c
@@ -3,15 +3,39 @@
  *
  * SPDX-License-Identifier:     GPL-2.0+
  */
+#include <asm/armv7.h>
 #include <asm/io.h>
 #include <asm/arch/hardware.h>
 
 #define GRF_SOC_CON2 0xff77024c
 
+#ifdef CONFIG_SPL_BUILD
+static void configure_l2ctlr(void)
+{
+       u32 l2ctlr;
+
+       l2ctlr = read_l2ctlr();
+       l2ctlr &= 0xfffc0000; /* clear bit0~bit17 */
+
+       /*
+        * Data RAM write latency: 2 cycles
+        * Data RAM read latency: 2 cycles
+        * Data RAM setup latency: 1 cycle
+        * Tag RAM write latency: 1 cycle
+        * Tag RAM read latency: 1 cycle
+        * Tag RAM setup latency: 1 cycle
+        */
+       l2ctlr |= (1 << 3 | 1 << 0);
+       write_l2ctlr(l2ctlr);
+}
+#endif
+
 int arch_cpu_init(void)
 {
        /* We do some SoC one time setting here. */
-
+#ifdef CONFIG_SPL_BUILD
+       configure_l2ctlr();
+#else
        /* Use rkpwm by default */
        rk_setreg(GRF_SOC_CON2, 1 << 0);
 
-- 
1.9.1

_______________________________________________
U-Boot mailing list
U-Boot@lists.denx.de
https://lists.denx.de/listinfo/u-boot

Reply via email to