On Fri, Mar 30, 2018 at 1:29 AM, Ivan Gorinov <ivan.gori...@intel.com> wrote: > Adding HPET as an alternative timer for x86 (default is TSC). > HPET counter has constant frequency and does not need calibration. > This change also makes TSC timer driver optional on x86. > If X86_TSC is disabled, early timer functions are provided by HPET. > > Signed-off-by: Ivan Gorinov <ivan.gori...@intel.com> > ---
Changelog? > arch/Kconfig | 2 +- > +config HPET_TIMER > + bool "High Precision Event Timers (HPET) support" > + depends on TIMER && X86 Does X86 makes any difference from building point of view? > + config = readl(regs + HPET_CONFIG_REG); > + config &= ~1; > + writel(config, regs + HPET_CONFIG_REG); 1 or BIT(0) is magic. Can be fixed in all places? > + writel(0, regs + HPET_MAIN_COUNT_L); > + writel(0, regs + HPET_MAIN_COUNT_H); Can we use writeq() here? > + tl = readl(regs + HPET_MAIN_COUNT_L); > + th = readl(regs + HPET_MAIN_COUNT_H); Ditto. -- With Best Regards, Andy Shevchenko _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
