On Wed, Apr 04, 2018 at 11:46:45AM +0200, Alexander Graf wrote:
> On 03.04.18 21:59, Heinrich Schuchardt wrote:
> > The UEFI spec mandates that unaligned memory access should be enabled if
> > supported by the CPU architecture.
> > 
> > This patch implements the function unaligned_access() to reset the aligned
> > access flag in the system control register (SCTLR). It is called when the
> > bootefi command is invoked.
> > 
> > Signed-off-by: Heinrich Schuchardt <xypron.g...@gmx.de>
> 
> This will not work unfortunately. Unaligned accesses are only handled by
> hardware on armv7 (and armv8) when the underlying memory is mapped as
> cached. Given the extremely wild situation on armv7 for page table
> setups, I'm not terribly confident to give anyone even the slightest
> hint that unaligned accesses would work on armv7.

Then having RAM mapped as Normal (not necessarily cacheable) should be
an automatic prerequisite for CONFIG_EFI, and if possible we should
write scary error messages to the console if this is not the case.

> IMHO we should really update the UEFI spec and mandate that all memory
> accesses have to be aligned on armv7.

Changing ABIs in backwards-incompatible ways is the opposite of what
UEFI is for.

> It's what grub is doing today already:
> 
>   http://git.savannah.gnu.org/cgit/grub.git/tree/configure.ac#n1279

Don't read too much into that. That comes for three reasons:
1) The U-boot API port.
2) Support for pre-v7 devices (like raspberry pi 1).
3) The wild changes in toolchain behaviour seen between
   various releases between gcc ~4.5 and gcc5.

There is no reason for that to be used for the arm-efi target, it's
just pure laziness on my behalf not to have changed it when the
arm-efi port was added.

> My recommendation would be to just pass the same compiler flags to iPXE
> on armv7.

Please don't.

/
    Leif

> 
> Alex
> 
> > ---
> >  arch/arm/cpu/armv7/Makefile |  4 ++++
> >  arch/arm/cpu/armv7/sctlr.S  | 23 +++++++++++++++++++++++
> >  2 files changed, 27 insertions(+)
> >  create mode 100644 arch/arm/cpu/armv7/sctlr.S
> > 
> > diff --git a/arch/arm/cpu/armv7/Makefile b/arch/arm/cpu/armv7/Makefile
> > index b14ee54519..cdb56e490b 100644
> > --- a/arch/arm/cpu/armv7/Makefile
> > +++ b/arch/arm/cpu/armv7/Makefile
> > @@ -12,6 +12,10 @@ obj-y    += cache_v7.o cache_v7_asm.o
> >  obj-y      += cpu.o cp15.o
> >  obj-y      += syslib.o
> >  
> > +ifneq ($(CONFIG_SPL_BUILD),y)
> > +obj-$(CONFIG_EFI_LOADER) += sctlr.o
> > +endif
> > +
> >  ifneq ($(CONFIG_SKIP_LOWLEVEL_INIT),y)
> >  obj-y      += lowlevel_init.o
> >  endif
> > diff --git a/arch/arm/cpu/armv7/sctlr.S b/arch/arm/cpu/armv7/sctlr.S
> > new file mode 100644
> > index 0000000000..cfdb7d2a52
> > --- /dev/null
> > +++ b/arch/arm/cpu/armv7/sctlr.S
> > @@ -0,0 +1,23 @@
> > +/*
> > + *  Routines to access the system control register
> > + *
> > + *  Copyright (c) 2018 Heinrich Schuchardt
> > + *
> > + *  SPDX-License-Identifier:     GPL-2.0+
> > + */
> > +
> > +#include <linux/linkage.h>
> > +
> > +/*
> > + * void allow_unaligned(void) - allow unaligned access
> > + *
> > + * This routine clears the aligned flag in the system control register.
> > + * After calling this routine unaligned access does no longer lead to a
> > + * data abort but is handled by the CPU.
> > + */
> > +ENTRY(allow_unaligned)
> > +   mrc     p15, 0, r0, c1, c0, 0   @ load system control register
> > +   bic     r0, r0, #2              @ clear aligned flag
> > +   mcr     p15, 0, r0, c1, c0, 0   @ write system control register
> > +   bx      lr                      @ return
> > +ENDPROC(allow_unaligned)
> > 
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