On 04/26/2018 08:15 AM, Ang, Chee Hong wrote:
> On Fri, 2018-04-20 at 05:42 +0200, Marek Vasut wrote:
>> On 04/20/2018 05:26 AM, chee.hong....@intel.com wrote:
>>>
>>> From: Chee Hong Ang <chee.hong....@intel.com>
>>>
>>> Enable 'fpga' command in u-boot. User will be able to use the
>>> fpga command to program the FPGA on Stratix10 SoC.
>>>
>>> Signed-off-by: Chee Hong Ang <chee.hong....@intel.com>
>>> ---
>>>  arch/arm/mach-socfpga/misc.c     | 20 +++++++++++++++++---
>>>  arch/arm/mach-socfpga/misc_s10.c |  4 ++++
>>>  drivers/fpga/altera.c            |  6 ++++++
>>>  include/altera.h                 |  8 ++++++++
>>>  4 files changed, 35 insertions(+), 3 deletions(-)
>>>
>>> diff --git a/arch/arm/mach-socfpga/misc.c b/arch/arm/mach-
>>> socfpga/misc.c
>>> index d15cbc7..e36c686 100644
>>> --- a/arch/arm/mach-socfpga/misc.c
>>> +++ b/arch/arm/mach-socfpga/misc.c
>>> @@ -87,11 +87,24 @@ int overwrite_console(void)
>>>  #endif
>>>  
>>>  #ifdef CONFIG_FPGA
>>> -/*
>>> - * FPGA programming support for SoC FPGA Cyclone V
>>> - */
>>>  static Altera_desc altera_fpga[] = {
>>>     {
>>> +#ifdef CONFIG_FPGA_STRATIX10
>> Create a separate structure for each FPGA family.
> Will be addressed in v2 patch.
>>
>>>
>>> +           /* FPGA programming support for SoC FPGA Stratix
>>> 10 */
>>> +           /* Family */
>>> +           Intel_FPGA_Stratix10,
>>> +           /* Interface type */
>>> +           secure_device_manager_mailbox,
>>> +           /* No limitation as additional data will be
>>> ignored */
>>> +           -1,
>>> +           /* No device function table */
>>> +           NULL,
>>> +           /* Base interface address specified in driver */
>>> +           NULL,
>>> +           /* No cookie implementation */
>>> +           0
>>> +#else
>>> +           /* FPGA programming support for SoC FPGA Cyclone V
>>> */
>>>             /* Family */
>>>             Altera_SoCFPGA,
>>>             /* Interface type */
>>> @@ -104,6 +117,7 @@ static Altera_desc altera_fpga[] = {
>>>             NULL,
>>>             /* No cookie implementation */
>>>             0
>>> +#endif
>>>     },
>>>  };
>>>  
>>> diff --git a/arch/arm/mach-socfpga/misc_s10.c b/arch/arm/mach-
>>> socfpga/misc_s10.c
>>> index b1cc6ca..012d8f6 100644
>>> --- a/arch/arm/mach-socfpga/misc_s10.c
>>> +++ b/arch/arm/mach-socfpga/misc_s10.c
>>> @@ -71,6 +71,10 @@ int arch_misc_init(void)
>>>  
>>>  int arch_early_init_r(void)
>>>  {
>>> +#ifdef CONFIG_FPGA
>>> +   socfpga_fpga_add();
>>> +#endif
>>> +
>>>     return 0;
>>>  }
>>>  
>>> diff --git a/drivers/fpga/altera.c b/drivers/fpga/altera.c
>>> index 135a357..b662ff5 100644
>>> --- a/drivers/fpga/altera.c
>>> +++ b/drivers/fpga/altera.c
>>> @@ -40,6 +40,9 @@ static const struct altera_fpga {
>>>  #if defined(CONFIG_FPGA_STRATIX_V)
>>>     { Altera_StratixV, "StratixV", stratixv_load, NULL, NULL
>>> },
>>>  #endif
>>> +#if defined(CONFIG_FPGA_STRATIX10)
>>> +   { Intel_FPGA_Stratix10, "Stratix10", stratix10_load, NULL,
>>> NULL },
>>> +#endif
>>>  #if defined(CONFIG_FPGA_SOCFPGA)
>>>     { Altera_SoCFPGA, "SoC FPGA", socfpga_load, NULL, NULL },
>>>  #endif
>>> @@ -155,6 +158,9 @@ int altera_info(Altera_desc *desc)
>>>     case fast_passive_parallel_security:
>>>             printf("Fast Passive Parallel with Security
>>> (FPPS)\n");
>>>             break;
>>> +   case secure_device_manager_mailbox:
>>> +           puts("Secure Device Manager (SDM) Mailbox\n");
>>> +           break;
>>>             /* Add new interface types here */
>>>     default:
>>>             printf("Unsupported interface type, %d\n", desc-
>>>> iface);
>>> diff --git a/include/altera.h b/include/altera.h
>>> index 48d3eb7..e9ba47a 100644
>>> --- a/include/altera.h
>>> +++ b/include/altera.h
>>> @@ -40,6 +40,8 @@ enum altera_iface {
>>>     fast_passive_parallel,
>>>     /* fast passive parallel with security (FPPS) */
>>>     fast_passive_parallel_security,
>>> +   /* secure device manager (SDM) mailbox */
>>> +   secure_device_manager_mailbox,
>>>     /* insert all new types before this */
>>>     max_altera_iface_type,
>>>  };
>>> @@ -55,6 +57,8 @@ enum altera_family {
>>>     Altera_StratixII,
>>>     /* StratixV Family */
>>>     Altera_StratixV,
>>> +   /* Stratix10 Family */
>>> +   Intel_FPGA_Stratix10,
>>>     /* SoCFPGA Family */
>>>     Altera_SoCFPGA,
>>>  
>>> @@ -117,4 +121,8 @@ int socfpga_load(Altera_desc *desc, const void
>>> *rbf_data, size_t rbf_size);
>>>  int stratixv_load(Altera_desc *desc, const void *rbf_data, size_t
>>> rbf_size);
>>>  #endif
>>>  
>>> +#ifdef CONFIG_FPGA_STRATIX10
>>> +int stratix10_load(Altera_desc *desc, const void *rbf_data, size_t
>>> rbf_size);
>> What is this doing here ?
> When user issue 'fpga load' command at uboot command prompt to do FPGA
> programming, this call back function will be invoked.

I mean, why is it part of this patch ? It's not implemented by this patch.

>>
>>>
>>> +#endif
>>> +
>>>  #endif /* _ALTERA_H_ */
>>>


-- 
Best regards,
Marek Vasut
_______________________________________________
U-Boot mailing list
U-Boot@lists.denx.de
https://lists.denx.de/listinfo/u-boot

Reply via email to